139 lines
4.8 KiB
HTML
139 lines
4.8 KiB
HTML
<!-- $NetBSD: driver5.html,v 1.1 1998/12/30 20:20:34 mcr Exp $ -->
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<!DOCTYPE HTML PUBLIC "-//IETF//DTD HTML Strict//EN">
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<html><head><title>
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TrueTime GPS/GOES/OMEGA Receivers
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</title></head><body><h3>
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TrueTime GPS/GOES/OMEGA Receivers
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</h3><hr>
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<p><h4>Synopsis</h4>
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<p>Address: 127.127.5.<var>u</var>
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<br>Reference ID: GPS, OMEGA, GOES
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<br>Driver ID: TRUETIME
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<br>Serial Port: <code>/dev/true<var>u</var></code>; 9600 baud, 8-bits,
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no parity
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<br>Features: <code>tty_clk</code>
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<p><h4>Description</h4>
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<p>This driver supports several models models of Kinemetrics/TrueTime
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timing receivers, including 468-DC MK III GOES Synchronized Clock, GPS-
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DC MK III and GPS/TM-TMD GPS Synchronized Clock, XL-DC (a 151-602-210,
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reported by the driver as a GPS/TM-TMD), GPS-800 TCU (an 805-957 with
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the RS232 Talker/Listener module), OM-DC OMEGA Synchronized Clock, and
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very likely others in the same model family that use the same timecode
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formats.
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<p>Most of this code is originally from refclock_wwvb.c with thanks. It
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has been so mangled that wwvb is not a recognizable ancestor.
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<pre>
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Timcode format: ADDD:HH:MM:SSQCL
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A - control A (this is stripped before we see it)
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Q - Quality indication (see below)
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C - Carriage return
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L - Line feed
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Quality codes indicate possible error of
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468-DC GOES Receiver:
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GPS-TM/TMD Receiver:
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? +/- 500 milliseconds # +/- 50 milliseconds
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* +/- 5 milliseconds . +/- 1 millisecond
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space less than 1 millisecond
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OM-DC OMEGA Receiver:
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> +/- 5 seconds
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? +/- 500 milliseconds # +/- 50 milliseconds
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* +/- 5 milliseconds . +/- 1 millisecond
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A-H less than 1 millisecond. Character indicates which
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station
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is being received as follows: A = Norway, B = Liberia,
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C = Hawaii, D = North Dakota, E = La Reunion, F =
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Argentina,
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G = Australia, H = Japan.
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</pre>
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<p>The carriage return start bit begins on 0 seconds and extends to 1
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bit time.
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<p>Notes on 468-DC and OMEGA receiver:
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<p>Send the clock a <code>R</code> or <code>C</code> and once per second
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a timestamp will appear. Send a <code>R</code> to get the satellite
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position once (GOES only).
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<p>Notes on the 468-DC receiver:
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<p>Since the old east/west satellite locations are only historical, you
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can't set your clock propagation delay settings correctly and still use
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automatic mode. The manual says to use a compromise when setting the
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switches. This results in significant errors. The solution; use fudge
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time1 and time2 to incorporate corrections. If your clock is set for 50
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and it should be 58 for using the west and 46 for using the east, use
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the line
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<p><code>fudge 127.127.5.0 time1 +0.008 time2 -0.004</code>
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<p>This corrects the 4 milliseconds advance and 8 milliseconds retard
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needed. The software will ask the clock which satellite it sees.
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<p>The PCL720 from PC Labs has an Intel 8253 look-alike, as well as a
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bunch of TTL input and output pins, all brought out to the back panel.
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If you wire a PPS signal (such as the TTL PPS coming out of a GOES or
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other Kinemetrics/Truetime clock) to the 8253's GATE0, and then also
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wire the 8253's OUT0 to the PCL720's INPUT3.BIT0, then we can read CTR0
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to get the number of microseconds since the last PPS upward edge,
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mediated by reading OUT0 to find out if the counter has wrapped around
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(this happens if more than 65535us (65ms) elapses between the PPS event
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and our being called.)
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<p><h4>Monitor Data</h4>
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<p>When enabled by the <code>flag4</code> fudge flag, every received
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timecode is written as-is to the <code>clockstats</code> file.
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<p><h4>Fudge Factors</h4>
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<dl>
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<dt><code>time1 <i>time</i></code>
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<dd>Specifies the time offset calibration factor, in seconds and
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fraction, to be used for the West satellite, with default 0.0.
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<p><dt><code>time2 <i>time</i></code>
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<dd>. Specifies the time offset calibration factor, in seconds and
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fraction, to be used for the East satellite, with default 0.0.
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<p><dt><code>stratum <i>number</i></code>
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<dd>Specifies the driver stratum, in decimal from 0 to 15, with default
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0.
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<p><dt><code>refid <i>string</i></code>
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<dd>Specifies the driver reference identifier, an ASCII string from one
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to four characters, with default <code>TRUE</code>.
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<p><dt><code>flag1 0 | 1</code>
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<dd>Silence the clock side of xntpd, just reading the clock without
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trying to write to it.
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<p><dt><code>flag2 0 | 1</code>
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<dd>Generate a debug file /tmp/true%d.
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<p><dt><code>flag3 0 | 1</code>
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<dd>Enable <code>ppsclock</code> line discipline/streams module if set.
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<p><dt><code>flag4 0 | 1</code>
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<dd>Enable <code>clockstats</code> recording if set.
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</dl>
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<p>Additional Information
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<p><a href="refclock.html"> Reference Clock Drivers</a>
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<hr><address>David L. Mills (mills@udel.edu)</address></body></html>
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