261 lines
7.4 KiB
C
261 lines
7.4 KiB
C
/* $NetBSD: slide.c,v 1.28 2012/07/31 15:50:36 bouyer Exp $ */
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/*-
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* Copyright (c) 2002 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: slide.c,v 1.28 2012/07/31 15:50:36 bouyer Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/pci/pciidereg.h>
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#include <dev/pci/pciidevar.h>
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#include <dev/pci/pciide_sl82c105_reg.h>
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static void sl82c105_chip_map(struct pciide_softc*,
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const struct pci_attach_args*);
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static void sl82c105_setup_channel(struct ata_channel*);
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static int slide_match(device_t, cfdata_t, void *);
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static void slide_attach(device_t, device_t, void *);
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CFATTACH_DECL_NEW(slide, sizeof(struct pciide_softc),
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slide_match, slide_attach, NULL, NULL);
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static const struct pciide_product_desc pciide_symphony_products[] = {
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{ PCI_PRODUCT_SYMPHONY_82C105,
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0,
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"Symphony Labs 82C105 IDE controller",
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sl82c105_chip_map,
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},
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{ 0,
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0,
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NULL,
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NULL,
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}
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};
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static const struct pciide_product_desc pciide_winbond_products[] = {
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{ PCI_PRODUCT_WINBOND_W83C553F_1,
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0,
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"Winbond W83C553F IDE controller",
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sl82c105_chip_map,
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},
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{ 0,
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0,
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NULL,
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NULL,
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}
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};
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static int
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slide_match(device_t parent, cfdata_t match, void *aux)
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{
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struct pci_attach_args *pa = aux;
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if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SYMPHONY) {
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if (pciide_lookup_product(pa->pa_id, pciide_symphony_products))
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return (2);
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}
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if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_WINBOND) {
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if (pciide_lookup_product(pa->pa_id, pciide_winbond_products))
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return (2);
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}
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return (0);
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}
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static void
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slide_attach(device_t parent, device_t self, void *aux)
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{
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struct pci_attach_args *pa = aux;
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struct pciide_softc *sc = device_private(self);
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const struct pciide_product_desc *pp = NULL;
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sc->sc_wdcdev.sc_atac.atac_dev = self;
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if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SYMPHONY)
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pp = pciide_lookup_product(pa->pa_id, pciide_symphony_products);
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if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_WINBOND)
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pp = pciide_lookup_product(pa->pa_id, pciide_winbond_products);
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if (pp == NULL)
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panic("slide_attach");
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pciide_common_attach(sc, pa, pp);
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}
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static int
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sl82c105_bugchk(const struct pci_attach_args *pa)
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{
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if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_WINBOND ||
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PCI_PRODUCT(pa->pa_id) != PCI_PRODUCT_WINBOND_W83C553F_0)
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return (0);
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if (PCI_REVISION(pa->pa_class) <= 0x05)
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return (1);
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return (0);
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}
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static void
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sl82c105_chip_map(struct pciide_softc *sc, const struct pci_attach_args *pa)
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{
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struct pciide_channel *cp;
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pcireg_t interface, idecr;
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int channel;
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if (pciide_chipen(sc, pa) == 0)
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return;
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aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev,
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"bus-master DMA support present");
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/*
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* Check to see if we're part of the Winbond 83c553 Southbridge.
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* If so, we need to disable DMA on rev. <= 5 of the southbridge.
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*/
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if (pci_find_device(NULL, sl82c105_bugchk)) {
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aprint_verbose(" but disabled due to 83c553 rev. <= 0x05");
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sc->sc_dma_ok = 0;
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} else
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pciide_mapreg_dma(sc, pa);
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aprint_verbose("\n");
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sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA32 | ATAC_CAP_DATA16;
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sc->sc_wdcdev.sc_atac.atac_pio_cap = 4;
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if (sc->sc_dma_ok) {
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sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA;
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sc->sc_wdcdev.irqack = pciide_irqack;
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sc->sc_wdcdev.sc_atac.atac_dma_cap = 2;
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}
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sc->sc_wdcdev.sc_atac.atac_set_modes = sl82c105_setup_channel;
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sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray;
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sc->sc_wdcdev.sc_atac.atac_nchannels = PCIIDE_NUM_CHANNELS;
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sc->sc_wdcdev.wdc_maxdrives = 2;
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idecr = pci_conf_read(sc->sc_pc, sc->sc_tag, SYMPH_IDECSR);
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interface = PCI_INTERFACE(pa->pa_class);
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wdc_allocate_regs(&sc->sc_wdcdev);
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for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels;
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channel++) {
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cp = &sc->pciide_channels[channel];
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if (pciide_chansetup(sc, channel, interface) == 0)
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continue;
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if ((channel == 0 && (idecr & IDECR_P0EN) == 0) ||
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(channel == 1 && (idecr & IDECR_P1EN) == 0)) {
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aprint_normal_dev(sc->sc_wdcdev.sc_atac.atac_dev,
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"%s channel ignored (disabled)\n", cp->name);
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cp->ata_channel.ch_flags |= ATACH_DISABLED;
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continue;
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}
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pciide_mapchan(pa, cp, interface, pciide_pci_intr);
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}
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}
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static void
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sl82c105_setup_channel(struct ata_channel *chp)
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{
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struct ata_drive_datas *drvp;
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struct pciide_channel *cp = CHAN_TO_PCHAN(chp);
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struct pciide_softc *sc = CHAN_TO_PCIIDE(chp);
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int pxdx_reg, drive, s;
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pcireg_t pxdx;
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/* Set up DMA if needed. */
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pciide_channel_dma_setup(cp);
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for (drive = 0; drive < 2; drive++) {
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pxdx_reg = ((chp->ch_channel == 0) ? SYMPH_P0D0CR
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: SYMPH_P1D0CR) +
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(drive * 4);
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pxdx = pci_conf_read(sc->sc_pc, sc->sc_tag, pxdx_reg);
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pxdx &= ~(PxDx_CMD_ON_MASK|PxDx_CMD_OFF_MASK);
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pxdx &= ~(PxDx_PWEN|PxDx_RDYEN|PxDx_RAEN);
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drvp = &chp->ch_drive[drive];
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/* If no drive, skip. */
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if (drvp->drive_type == ATA_DRIVET_NONE) {
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pci_conf_write(sc->sc_pc, sc->sc_tag, pxdx_reg, pxdx);
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continue;
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}
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if (drvp->drive_flags & ATA_DRIVE_DMA) {
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/*
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* Timings will be used for both PIO and DMA,
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* so adjust DMA mode if needed.
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*/
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if (drvp->PIO_mode >= 3) {
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if ((drvp->DMA_mode + 2) > drvp->PIO_mode)
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drvp->DMA_mode = drvp->PIO_mode - 2;
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if (drvp->DMA_mode < 1) {
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/*
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* Can't mix both PIO and DMA.
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* Disable DMA.
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*/
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s = splbio();
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drvp->drive_flags &= ~ATA_DRIVE_DMA;
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splx(s);
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}
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} else {
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/*
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* Can't mix both PIO and DMA. Disable
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* DMA.
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*/
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s = splbio();
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drvp->drive_flags &= ~ATA_DRIVE_DMA;
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splx(s);
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}
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}
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if (drvp->drive_flags & ATA_DRIVE_DMA) {
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/* Use multi-word DMA. */
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pxdx |= symph_mw_dma_times[drvp->DMA_mode].cmd_on <<
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PxDx_CMD_ON_SHIFT;
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pxdx |= symph_mw_dma_times[drvp->DMA_mode].cmd_off;
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} else {
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pxdx |= symph_pio_times[drvp->PIO_mode].cmd_on <<
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PxDx_CMD_ON_SHIFT;
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pxdx |= symph_pio_times[drvp->PIO_mode].cmd_off;
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}
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/* XXX PxDx_PWEN? PxDx_RDYEN? PxDx_RAEN? */
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/* ...and set the mode for this drive. */
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pci_conf_write(sc->sc_pc, sc->sc_tag, pxdx_reg, pxdx);
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}
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}
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