281 lines
8.6 KiB
C
281 lines
8.6 KiB
C
/* $NetBSD: if_axereg.h,v 1.17 2015/04/14 20:32:36 riastradh Exp $ */
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/*
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* Copyright (c) 1997, 1998, 1999, 2000-2003
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* Bill Paul <wpaul@windriver.com>. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Bill Paul.
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* 4. Neither the name of the author nor the names of any co-contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD: src/sys/dev/usb/if_axereg.h,v 1.2 2003/06/15 21:45:43 wpaul Exp $
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*/
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/*
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* Definitions for the ASIX Electronics AX88172 to ethernet controller.
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*/
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#include <sys/rndsource.h>
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/*
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* Vendor specific commands
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* ASIX conveniently doesn't document the 'set NODEID' command in their
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* datasheet (thanks a lot guys).
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* To make handling these commands easier, I added some extra data
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* which is decided by the axe_cmd() routine. Commands are encoded
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* in 16 bites, with the format: LDCC. L and D are both nibbles in
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* the high byte. L represents the data length (0 to 15) and D
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* represents the direction (0 for vendor read, 1 for vendor write).
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* CC is the command byte, as specified in the manual.
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*/
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#define AXE_CMD_DIR(x) (((x) & 0x0F00) >> 8)
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#define AXE_CMD_LEN(x) (((x) & 0xF000) >> 12)
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#define AXE_CMD_CMD(x) ((x) & 0x00FF)
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#define AXE_172_CMD_READ_RXTX_SRAM 0x2002
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#define AXE_182_CMD_READ_RXTX_SRAM 0x6002
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#define AXE_172_CMD_WRITE_RX_SRAM 0x0103
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#define AXE_172_CMD_WRITE_TX_SRAM 0x0104
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#define AXE_182_CMD_WRITE_RXTX_SRAM 0x8103
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#define AXE_CMD_MII_OPMODE_SW 0x0106
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#define AXE_CMD_MII_READ_REG 0x2007
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#define AXE_CMD_MII_WRITE_REG 0x2108
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#define AXE_CMD_MII_READ_OPMODE 0x1009
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#define AXE_CMD_MII_OPMODE_HW 0x010A
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#define AXE_CMD_SROM_READ 0x200B
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#define AXE_CMD_SROM_WRITE 0x010C
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#define AXE_CMD_SROM_WR_ENABLE 0x010D
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#define AXE_CMD_SROM_WR_DISABLE 0x010E
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#define AXE_CMD_RXCTL_READ 0x200F
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#define AXE_CMD_RXCTL_WRITE 0x0110
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#define AXE_CMD_READ_IPG012 0x3011
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#define AXE_172_CMD_WRITE_IPG0 0x0112
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#define AXE_172_CMD_WRITE_IPG1 0x0113
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#define AXE_172_CMD_WRITE_IPG2 0x0114
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#define AXE_178_CMD_WRITE_IPG012 0x0112
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#define AXE_CMD_READ_MCAST 0x8015
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#define AXE_CMD_WRITE_MCAST 0x8116
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#define AXE_172_CMD_READ_NODEID 0x6017
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#define AXE_172_CMD_WRITE_NODEID 0x6118
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#define AXE_178_CMD_READ_NODEID 0x6013
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#define AXE_178_CMD_WRITE_NODEID 0x6114
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#define AXE_CMD_READ_PHYID 0x2019
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#define AXE_172_CMD_READ_MEDIA 0x101A
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#define AXE_178_CMD_READ_MEDIA 0x201A
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#define AXE_CMD_WRITE_MEDIA 0x011B
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#define AXE_CMD_READ_MONITOR_MODE 0x101C
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#define AXE_CMD_WRITE_MONITOR_MODE 0x011D
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#define AXE_CMD_READ_GPIO 0x101E
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#define AXE_CMD_WRITE_GPIO 0x011F
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#define AXE_CMD_SW_RESET_REG 0x0120
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#define AXE_CMD_SW_PHY_STATUS 0x0021
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#define AXE_CMD_SW_PHY_SELECT 0x0122
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#define AXE_SW_RESET_CLEAR 0x00
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#define AXE_SW_RESET_RR 0x01
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#define AXE_SW_RESET_RT 0x02
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#define AXE_SW_RESET_PRTE 0x04
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#define AXE_SW_RESET_PRL 0x08
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#define AXE_SW_RESET_BZ 0x10
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#define AXE_SW_RESET_IPRL 0x20
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#define AXE_SW_RESET_IPPD 0x40
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/* AX88178 documentation says to always write this bit... */
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#define AXE_178_RESET_MAGIC 0x40
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#define AXE_178_MEDIA_GMII 0x0001
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#define AXE_MEDIA_FULL_DUPLEX 0x0002
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#define AXE_172_MEDIA_TX_ABORT_ALLOW 0x0004
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/* AX88178 documentation says to always write 1 to reserved bit... */
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#define AXE_178_MEDIA_MAGIC 0x0004
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#define AXE_178_MEDIA_ENCK 0x0008
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#define AXE_172_MEDIA_FLOW_CONTROL_EN 0x0010
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#define AXE_178_MEDIA_RXFLOW_CONTROL_EN 0x0010
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#define AXE_178_MEDIA_TXFLOW_CONTROL_EN 0x0020
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#define AXE_178_MEDIA_JUMBO_EN 0x0040
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#define AXE_178_MEDIA_LTPF_ONLY 0x0080
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#define AXE_178_MEDIA_RX_EN 0x0100
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#define AXE_178_MEDIA_100TX 0x0200
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#define AXE_178_MEDIA_SBP 0x0800
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#define AXE_178_MEDIA_SUPERMAC 0x1000
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#define AXE_PHY_SEL_PRI 1
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#define AXE_PHY_SEL_SEC 0
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#define AXE_PHY_TYPE_MASK 0xE0
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#define AXE_PHY_TYPE_SHIFT 5
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#define AXE_PHY_TYPE(x) \
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(((x) & AXE_PHY_TYPE_MASK) >> AXE_PHY_TYPE_SHIFT)
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#define PHY_TYPE_100_HOME 0 /* 10/100 or 1M HOME PHY */
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#define PHY_TYPE_GIG 1 /* Gigabit PHY */
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#define PHY_TYPE_SPECIAL 4 /* Special case */
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#define PHY_TYPE_RSVD 5 /* Reserved */
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#define PHY_TYPE_NON_SUP 7 /* Non-supported PHY */
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#define AXE_PHY_NO_MASK 0x1F
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#define AXE_PHY_NO(x) ((x) & AXE_PHY_NO_MASK)
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#define AXE_772_PHY_NO_EPHY 0x10 /* Embedded 10/100 PHY of AX88772 */
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#define AXE_GPIO0_EN 0x01
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#define AXE_GPIO0 0x02
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#define AXE_GPIO1_EN 0x04
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#define AXE_GPIO1 0x08
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#define AXE_GPIO2_EN 0x10
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#define AXE_GPIO2 0x20
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#define AXE_GPIO_RELOAD_EEPROM 0x80
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#define AXE_PHY_MODE_MARVELL 0x00
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#define AXE_PHY_MODE_CICADA 0x01
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#define AXE_PHY_MODE_AGERE 0x02
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#define AXE_PHY_MODE_CICADA_V2 0x05
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#define AXE_PHY_MODE_AGERE_GMII 0x06
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#define AXE_PHY_MODE_CICADA_V2_ASIX 0x09
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#define AXE_PHY_MODE_REALTEK_8211CL 0x0C
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#define AXE_PHY_MODE_REALTEK_8211BN 0x0D
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#define AXE_PHY_MODE_REALTEK_8251CL 0x0E
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#define AXE_PHY_MODE_ATTANSIC 0x40
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#define AXE_RXCMD_PROMISC 0x0001
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#define AXE_RXCMD_ALLMULTI 0x0002
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#define AXE_172_RXCMD_UNICAST 0x0004
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#define AXE_178_RXCMD_KEEP_INVALID_CRC 0x0004
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#define AXE_RXCMD_BROADCAST 0x0008
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#define AXE_RXCMD_MULTICAST 0x0010
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#define AXE_RXCMD_ENABLE 0x0080
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#define AXE_178_RXCMD_MFB 0x0300
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#define AXE_NOPHY 0xE0
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#define AXE_INTPHY 0x10
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#define AXE_772B_RXCMD_RH1M 0x0100
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#define AXE_772B_RXCMD_RH2M 0x0200
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#define AXE_772B_RXCMD_RH3M 0x0400
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#define AXE_RH1M_RXLEN_MASK 0x07ff
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#define AXE_TIMEOUT 1000
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#define AXE_172_BUFSZ 1536
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#define AXE_178_MIN_BUFSZ 2048
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#define AXE_178_MAX_BUFSZ 16384
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#define AXE_MIN_FRAMELEN 60
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#define AXE_RX_FRAMES 1
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#define AXE_TX_FRAMES 1
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#define AXE_RX_LIST_CNT 1
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#define AXE_TX_LIST_CNT 1
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#define AXE_CTL_READ 0x01
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#define AXE_CTL_WRITE 0x02
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#define AXE_CONFIG_NO 1
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#define AXE_IFACE_IDX 0
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/*
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* The interrupt endpoint is currently unused
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* by the ASIX part.
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*/
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#define AXE_ENDPT_RX 0x0
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#define AXE_ENDPT_TX 0x1
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#define AXE_ENDPT_INTR 0x2
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#define AXE_ENDPT_MAX 0x3
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struct axe_type {
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struct usb_devno axe_dev;
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uint16_t axe_flags;
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#define AX178 0x0001 /* AX88178 */
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#define AX772 0x0002 /* AX88772 */
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#define AX772B 0x0004 /* AX88772B */
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#define AXE_ANY_PHY 0x1000 /* Chip lies about valid phys */
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#define AXE_MII 0x2000 /* Chip-specific MII handling */
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};
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struct axe_softc;
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struct axe_chain {
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struct axe_softc *axe_sc;
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usbd_xfer_handle axe_xfer;
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uint8_t *axe_buf;
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int axe_accum;
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int axe_idx;
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};
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struct axe_cdata {
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struct axe_chain axe_tx_chain[AXE_TX_LIST_CNT];
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struct axe_chain axe_rx_chain[AXE_RX_LIST_CNT];
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int axe_tx_prod;
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int axe_tx_cons;
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int axe_tx_cnt;
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int axe_rx_prod;
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};
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struct axe_sframe_hdr {
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uint16_t len;
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uint16_t ilen;
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} __packed;
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struct axe_softc {
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device_t axe_dev;
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struct ethercom axe_ec;
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struct mii_data axe_mii;
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krndsource_t rnd_source;
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usbd_device_handle axe_udev;
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usbd_interface_handle axe_iface;
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uint16_t axe_vendor;
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uint16_t axe_product;
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uint16_t axe_flags;
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int axe_ed[AXE_ENDPT_MAX];
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usbd_pipe_handle axe_ep[AXE_ENDPT_MAX];
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int axe_if_flags;
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struct axe_cdata axe_cdata;
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struct callout axe_stat_ch;
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int axe_refcnt;
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bool axe_dying;
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bool axe_attached;
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struct usb_task axe_tick_task;
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kmutex_t axe_mii_lock;
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int axe_link;
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uint8_t axe_ipgs[3];
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uint8_t axe_phyaddrs[2];
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int axe_phyno;
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struct timeval axe_rx_notice;
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int axe_bufsz;
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#define sc_if axe_ec.ec_if
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};
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#define ETHER_ALIGN 2
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