0bc69b6498
and move them in their proper places. Move the BRI registry from layer 2 (duh!) to layer 4, so active cards (which don't have layer 3 or layer 2 in their driver). Remove all remaining hard coded controller and driver types. Remove any arbitrary hard coded limits, at least those that show up in the internal API. This fixes PR 15950.
115 lines
4.5 KiB
C
115 lines
4.5 KiB
C
/*
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* Copyright (c) 1997-2002 Martin Husemann <martin@duskware.de>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#ifndef DIEHLISDNVAR
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#define DIEHLISDNVAR
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#if defined(KERNEL) || defined(_KERNEL)
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#define DAIC_MAX_PORT 4
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#define DAIC_ISA_MEMSIZE 2048
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#define DAIC_ISA_QUADSIZE (DAIC_MAX_PORT*DAIC_ISA_MEMSIZE)
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#define DAIC_MAX_ACTIVE (2*DAIC_MAX_PORT) /* simlutaneous connections on one instance */
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/* A queue of pending outgoing calls */
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struct outcallentry {
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TAILQ_ENTRY(outcallentry) queue;
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unsigned int cdid; /* call descriptor id for layer 4 */
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u_int8_t dchan_id; /* task id for microcode */
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u_int8_t rc; /* return code */
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};
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/* One active connection */
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struct daic_connection {
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u_int cdid; /* layer 4 call descriptor id */
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struct ifqueue tx_queue; /* outgoing data */
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struct ifqueue rx_queue; /* incoming data */
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isdn_link_t isdn_linktab; /* description of ourself */
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const struct isdn_l4_driver_functions
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*l4_driver; /* layer 4 driver */
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void *l4_driver_softc; /* layer 4 driver instance */
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u_int8_t dchan_inst; /* d-channel instance */
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u_int8_t dchan_rc; /* return code for dchannel requests */
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u_int8_t bchan_inst; /* b-channel instance */
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u_int8_t bchan_rc; /* return code for bchannel requests */
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};
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/*
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* One BRI as exposed to the upper layers, with all the internal management
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* information we need for it. A pointer to this is passed as the driver
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* token.
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*/
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struct daic_unit {
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struct daic_softc *du_sc; /* pointer to softc */
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const struct isdn_l3_driver *du_l3;
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int du_port; /* port number (on multi BRI cards) */
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int du_state; /* state of board, see below */
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#define DAIC_STATE_COLD 0 /* nothing happened to the board */
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#define DAIC_STATE_DOWNLOAD 1 /* the card is waiting for protocol code */
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#define DAIC_STATE_TESTING 2 /* waiting for first interrupt from card */
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#define DAIC_STATE_RUNNING 3 /* the protocol is running */
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#define DAIC_STATE_DIAGNOSTIC 4 /* temporary disabled for diagnostics */
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int du_assign; /* allocate new protocol instance */
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#define DAIC_ASSIGN_PENDING 1 /* we are awaiting a new ID */
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#define DAIC_ASSIGN_SLEEPING 2 /* somebody sleeping, wakeup after we got the ID */
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#define DAIC_ASSIGN_GLOBAL 4 /* result is a global d-channel id */
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#define DAIC_ASSIGN_NOGLOBAL 8 /* need to assign a global d-channel id */
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u_int8_t du_global_dchan; /* handle of global dchannel instance */
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u_int8_t du_request_res; /* result of requests */
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u_int8_t du_assign_res; /* result of assigns */
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};
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/* superclass of all softc structs for attachments, you should
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* always be able to cast an attachments struct device *self to this. */
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struct daic_softc {
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struct device sc_dev;
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bus_space_tag_t sc_iot; /* bus identifier */
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bus_space_handle_t sc_ioh; /* mem handle */
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int sc_cardtype; /* variant of card */
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#define DAIC_TYPE_S 0
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#define DAIC_TYPE_SX 1
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#define DAIC_TYPE_SCOM 2
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#define DAIC_TYPE_QUAD 3
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struct daic_unit sc_port[DAIC_MAX_PORT];
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/* one record for each b-channel we could handle concurrently */
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struct daic_connection sc_con[DAIC_MAX_ACTIVE];
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/* a tailq of ougoing calls no yet assigned to any b-channel */
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TAILQ_HEAD(outcallhead, outcallentry) sc_outcalls[DAIC_MAX_PORT];
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};
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/*
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* functions exported from MI part
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*/
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extern int daic_probe __P((bus_space_tag_t bus, bus_space_handle_t io));
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extern void daic_attach __P((struct device *self, struct daic_softc *sc));
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extern int daic_intr __P((struct daic_softc *));
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#endif
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#endif
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