147 lines
3.9 KiB
C
147 lines
3.9 KiB
C
/* $NetBSD: arm11_pmc.c,v 1.3 2008/07/03 06:12:02 matt Exp $ */
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/* Copyright (c) 2007 Microsoft
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Microsoft
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* support for ARM 11 Performance Monitor Counters
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: arm11_pmc.c,v 1.3 2008/07/03 06:12:02 matt Exp $");
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#include "opt_perfctrs.h"
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/time.h>
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#include <sys/timetc.h>
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#include <dev/clock_subr.h>
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#include <arm/armreg.h>
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#include <arm/cpufunc.h>
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#ifndef ARM11_PMC_CCNT_HZ
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# define ARM11_PMC_CCNT_HZ 400000000 /* 400MHz */
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#endif
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void arm11_pmc_ccnt_init(void);
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#define COUNTS_PER_USEC (ARM11_PMC_CCNT_HZ / 1000000)
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static uint32_t counts_per_wrap = ~0UL; /* XXX off by 1 */
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static inline uint32_t
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arm11_pmc_ctrl_read(void)
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{
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uint32_t val;
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__asm volatile ("mrc p15, 0, %0, c15, c12, 0" : "=r" (val));
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return val;
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}
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static inline void
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arm11_pmc_ctrl_write(uint32_t val)
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{
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__asm volatile ("mcr p15, 0, %0, c15, c12, 0" :: "r" (val));
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}
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static inline uint32_t
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arm11_pmc_ccnt_read(void)
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{
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uint32_t val;
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__asm volatile ("mrc p15, 0, %0, c15, c12, 1" : "=r" (val));
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return val;
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}
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static inline void
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arm11_pmc_ccnt_write(uint32_t val)
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{
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__asm volatile ("mcr p15, 0, %0, c15, c12, 1;" :: "r" (val));
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}
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/*
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* enable the PMC CCNT for delay()
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*/
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void
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arm11_pmc_ccnt_init(void)
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{
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uint32_t val;
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val = ARM11_PMCCTL_E | ARM11_PMCCTL_P | ARM11_PMCCTL_C;
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arm11_pmc_ctrl_write(val);
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}
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/*
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* delay - for "at least" arg usec
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*
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* NOTE: at 400MHz we are restricted to (uint32_t)~0 "counts"
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* if this is a problem, accumulate counts in LL vars
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*/
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#define DELAY_ARG_LIMIT (((uint32_t)~0) / COUNTS_PER_USEC) /* about 10 sec */
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void
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delay(u_int arg)
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{
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uint32_t ctrl;
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uint32_t cur;
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uint32_t last;
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uint32_t delta = 0;
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uint32_t usecs = 0;
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if (arg > DELAY_ARG_LIMIT)
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panic("delay: arg %u overflow, limit is %d usec\n", arg, DELAY_ARG_LIMIT);
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last = arm11_pmc_ccnt_read();
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delta = usecs = 0;
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while (arg > usecs) {
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cur = arm11_pmc_ccnt_read();
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ctrl = arm11_pmc_ctrl_read();
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if (ctrl & ARM11_PMCCTL_CCR) {
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/*
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* reset CCR, do not reset other write-to-clear flags;
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* keep the rest of the PMC Control Reg configuration
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*/
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ctrl &= ~(ARM11_PMCCTL_CR0|ARM11_PMCCTL_CR1);
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arm11_pmc_ctrl_write(ctrl);
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delta += (last + (counts_per_wrap - cur));
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} else {
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delta += (cur - last);
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}
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last = cur;
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if (delta >= COUNTS_PER_USEC) {
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usecs += delta / COUNTS_PER_USEC;
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delta %= COUNTS_PER_USEC;
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}
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}
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}
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