248 lines
6.6 KiB
C
248 lines
6.6 KiB
C
/*
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* Copyright (c) 1997, 2000 Hellmuth Michaelis. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*---------------------------------------------------------------------------
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*
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* i4b_isic.c - global isic stuff
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* ==============================
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*
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* $Id: isic.c,v 1.3 2001/11/13 13:14:39 lukem Exp $
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*
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* last edit-date: [Fri Jan 5 11:36:10 2001]
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*
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*---------------------------------------------------------------------------*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: isic.c,v 1.3 2001/11/13 13:14:39 lukem Exp $");
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#include <sys/param.h>
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#include <sys/ioccom.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#include <sys/socket.h>
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#include <net/if.h>
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#include <sys/callout.h>
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#include <sys/device.h>
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#include <machine/bus.h>
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#include <netisdn/i4b_debug.h>
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#include <netisdn/i4b_ioctl.h>
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#include <netisdn/i4b_trace.h>
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#include <dev/ic/isic_l1.h>
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#include <dev/ic/ipac.h>
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#include <dev/ic/isac.h>
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#include <dev/ic/hscx.h>
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#include <netisdn/i4b_l1l2.h>
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#include <netisdn/i4b_mbuf.h>
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#include <netisdn/i4b_global.h>
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/*---------------------------------------------------------------------------*
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* isic - device driver interrupt routine
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*---------------------------------------------------------------------------*/
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int
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isicintr(void *arg)
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{
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struct l1_softc *sc = arg;
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if(sc->sc_ipac == 0) /* HSCX/ISAC interupt routine */
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{
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u_char was_hscx_irq = 0;
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u_char was_isac_irq = 0;
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register u_char hscx_irq_stat;
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register u_char isac_irq_stat;
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for(;;)
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{
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/* get hscx irq status from hscx b ista */
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hscx_irq_stat =
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HSCX_READ(HSCX_CH_B, H_ISTA) & ~HSCX_B_IMASK;
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/* get isac irq status */
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isac_irq_stat = ISAC_READ(I_ISTA);
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/* do as long as there are pending irqs in the chips */
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if(!hscx_irq_stat && !isac_irq_stat)
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break;
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if(hscx_irq_stat & (HSCX_ISTA_RME | HSCX_ISTA_RPF |
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HSCX_ISTA_RSC | HSCX_ISTA_XPR |
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HSCX_ISTA_TIN | HSCX_ISTA_EXB))
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{
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isic_hscx_irq(sc, hscx_irq_stat,
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HSCX_CH_B,
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hscx_irq_stat & HSCX_ISTA_EXB);
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was_hscx_irq = 1;
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}
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if(hscx_irq_stat & (HSCX_ISTA_ICA | HSCX_ISTA_EXA))
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{
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isic_hscx_irq(sc,
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HSCX_READ(HSCX_CH_A, H_ISTA) & ~HSCX_A_IMASK,
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HSCX_CH_A,
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hscx_irq_stat & HSCX_ISTA_EXA);
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was_hscx_irq = 1;
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}
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if(isac_irq_stat)
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{
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isic_isac_irq(sc, isac_irq_stat); /* isac handler */
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was_isac_irq = 1;
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}
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}
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HSCX_WRITE(0, H_MASK, 0xff);
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ISAC_WRITE(I_MASK, 0xff);
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HSCX_WRITE(1, H_MASK, 0xff);
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if (sc->clearirq)
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{
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DELAY(80);
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sc->clearirq(sc);
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} else
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DELAY(100);
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HSCX_WRITE(0, H_MASK, HSCX_A_IMASK);
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ISAC_WRITE(I_MASK, ISAC_IMASK);
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HSCX_WRITE(1, H_MASK, HSCX_B_IMASK);
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return(was_hscx_irq || was_isac_irq);
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}
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else /* IPAC interrupt routine */
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{
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register u_char ipac_irq_stat;
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register u_char was_ipac_irq = 0;
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for(;;)
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{
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/* get global irq status */
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ipac_irq_stat = (IPAC_READ(IPAC_ISTA)) & 0x3f;
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/* check hscx a */
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if(ipac_irq_stat & (IPAC_ISTA_ICA | IPAC_ISTA_EXA))
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{
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/* HSCX A interrupt */
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isic_hscx_irq(sc, HSCX_READ(HSCX_CH_A, H_ISTA),
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HSCX_CH_A,
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ipac_irq_stat & IPAC_ISTA_EXA);
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was_ipac_irq = 1;
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}
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if(ipac_irq_stat & (IPAC_ISTA_ICB | IPAC_ISTA_EXB))
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{
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/* HSCX B interrupt */
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isic_hscx_irq(sc, HSCX_READ(HSCX_CH_B, H_ISTA),
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HSCX_CH_B,
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ipac_irq_stat & IPAC_ISTA_EXB);
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was_ipac_irq = 1;
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}
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if(ipac_irq_stat & IPAC_ISTA_ICD)
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{
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/* ISAC interrupt */
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isic_isac_irq(sc, ISAC_READ(I_ISTA));
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was_ipac_irq = 1;
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}
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if(ipac_irq_stat & IPAC_ISTA_EXD)
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{
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/* force ISAC interrupt handling */
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isic_isac_irq(sc, ISAC_ISTA_EXI);
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was_ipac_irq = 1;
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}
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/* do as long as there are pending irqs in the chip */
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if(!ipac_irq_stat)
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break;
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}
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IPAC_WRITE(IPAC_MASK, 0xff);
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DELAY(50);
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IPAC_WRITE(IPAC_MASK, 0xc0);
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return(was_ipac_irq);
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}
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}
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/*---------------------------------------------------------------------------*
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* isic_recovery - try to recover from irq lockup
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*---------------------------------------------------------------------------*/
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void
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isic_recover(struct l1_softc *sc)
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{
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u_char byte;
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/* get hscx irq status from hscx b ista */
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byte = HSCX_READ(HSCX_CH_B, H_ISTA);
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NDBGL1(L1_ERROR, "HSCX B: ISTA = 0x%x", byte);
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if(byte & HSCX_ISTA_ICA)
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NDBGL1(L1_ERROR, "HSCX A: ISTA = 0x%x", (u_char)HSCX_READ(HSCX_CH_A, H_ISTA));
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if(byte & HSCX_ISTA_EXB)
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NDBGL1(L1_ERROR, "HSCX B: EXIR = 0x%x", (u_char)HSCX_READ(HSCX_CH_B, H_EXIR));
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if(byte & HSCX_ISTA_EXA)
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NDBGL1(L1_ERROR, "HSCX A: EXIR = 0x%x", (u_char)HSCX_READ(HSCX_CH_A, H_EXIR));
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/* get isac irq status */
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byte = ISAC_READ(I_ISTA);
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NDBGL1(L1_ERROR, " ISAC: ISTA = 0x%x", byte);
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if(byte & ISAC_ISTA_EXI)
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NDBGL1(L1_ERROR, " ISAC: EXIR = 0x%x", (u_char)ISAC_READ(I_EXIR));
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if(byte & ISAC_ISTA_CISQ)
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{
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byte = ISAC_READ(I_CIRR);
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NDBGL1(L1_ERROR, " ISAC: CISQ = 0x%x", byte);
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if(byte & ISAC_CIRR_SQC)
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NDBGL1(L1_ERROR, " ISAC: SQRR = 0x%x", (u_char)ISAC_READ(I_SQRR));
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}
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NDBGL1(L1_ERROR, "HSCX B: IMASK = 0x%x", HSCX_B_IMASK);
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NDBGL1(L1_ERROR, "HSCX A: IMASK = 0x%x", HSCX_A_IMASK);
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HSCX_WRITE(0, H_MASK, 0xff);
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HSCX_WRITE(1, H_MASK, 0xff);
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DELAY(100);
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HSCX_WRITE(0, H_MASK, HSCX_A_IMASK);
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HSCX_WRITE(1, H_MASK, HSCX_B_IMASK);
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DELAY(100);
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NDBGL1(L1_ERROR, " ISAC: IMASK = 0x%x", ISAC_IMASK);
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ISAC_WRITE(I_MASK, 0xff);
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DELAY(100);
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ISAC_WRITE(I_MASK, ISAC_IMASK);
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}
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