226 lines
6.2 KiB
C
226 lines
6.2 KiB
C
/* $NetBSD: fpu_subr.c,v 1.1 2001/06/13 06:01:47 simonb Exp $ */
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/*
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This software was developed by the Computer Systems Engineering group
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* at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
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* contributed to Berkeley.
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*
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* All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Lawrence Berkeley Laboratory.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)fpu_subr.c 8.1 (Berkeley) 6/11/93
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*/
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/*
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* FPU subroutines.
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*/
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#include <sys/types.h>
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#if defined(DIAGNOSTIC)||defined(DEBUG)
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#include <sys/systm.h>
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#endif
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#include <machine/reg.h>
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#include <powerpc/instr.h>
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#include <machine/fpu.h>
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#include <powerpc/fpu/fpu_arith.h>
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#include <powerpc/fpu/fpu_emu.h>
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#include <powerpc/fpu/fpu_extern.h>
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/*
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* Shift the given number right rsh bits. Any bits that `fall off' will get
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* shoved into the sticky field; we return the resulting sticky. Note that
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* shifting NaNs is legal (this will never shift all bits out); a NaN's
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* sticky field is ignored anyway.
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*/
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int
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fpu_shr(struct fpn *fp, int rsh)
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{
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u_int m0, m1, m2, m3, s;
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int lsh;
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#ifdef DIAGNOSTIC
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if (rsh <= 0 || (fp->fp_class != FPC_NUM && !ISNAN(fp)))
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panic("fpu_rightshift 1");
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#endif
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m0 = fp->fp_mant[0];
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m1 = fp->fp_mant[1];
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m2 = fp->fp_mant[2];
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m3 = fp->fp_mant[3];
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/* If shifting all the bits out, take a shortcut. */
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if (rsh >= FP_NMANT) {
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#ifdef DIAGNOSTIC
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if ((m0 | m1 | m2 | m3) == 0)
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panic("fpu_rightshift 2");
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#endif
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fp->fp_mant[0] = 0;
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fp->fp_mant[1] = 0;
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fp->fp_mant[2] = 0;
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fp->fp_mant[3] = 0;
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#ifdef notdef
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if ((m0 | m1 | m2 | m3) == 0)
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fp->fp_class = FPC_ZERO;
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else
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#endif
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fp->fp_sticky = 1;
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return (1);
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}
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/* Squish out full words. */
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s = fp->fp_sticky;
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if (rsh >= 32 * 3) {
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s |= m3 | m2 | m1;
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m3 = m0, m2 = 0, m1 = 0, m0 = 0;
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} else if (rsh >= 32 * 2) {
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s |= m3 | m2;
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m3 = m1, m2 = m0, m1 = 0, m0 = 0;
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} else if (rsh >= 32) {
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s |= m3;
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m3 = m2, m2 = m1, m1 = m0, m0 = 0;
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}
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/* Handle any remaining partial word. */
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if ((rsh &= 31) != 0) {
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lsh = 32 - rsh;
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s |= m3 << lsh;
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m3 = (m3 >> rsh) | (m2 << lsh);
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m2 = (m2 >> rsh) | (m1 << lsh);
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m1 = (m1 >> rsh) | (m0 << lsh);
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m0 >>= rsh;
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}
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fp->fp_mant[0] = m0;
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fp->fp_mant[1] = m1;
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fp->fp_mant[2] = m2;
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fp->fp_mant[3] = m3;
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fp->fp_sticky = s;
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return (s);
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}
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/*
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* Force a number to be normal, i.e., make its fraction have all zero
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* bits before FP_1, then FP_1, then all 1 bits. This is used for denorms
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* and (sometimes) for intermediate results.
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*
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* Internally, this may use a `supernormal' -- a number whose fp_mant
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* is greater than or equal to 2.0 -- so as a side effect you can hand it
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* a supernormal and it will fix it (provided fp->fp_mant[3] == 0).
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*/
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void
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fpu_norm(struct fpn *fp)
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{
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u_int m0, m1, m2, m3, top, sup, nrm;
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int lsh, rsh, exp;
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exp = fp->fp_exp;
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m0 = fp->fp_mant[0];
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m1 = fp->fp_mant[1];
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m2 = fp->fp_mant[2];
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m3 = fp->fp_mant[3];
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/* Handle severe subnormals with 32-bit moves. */
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if (m0 == 0) {
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if (m1)
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m0 = m1, m1 = m2, m2 = m3, m3 = 0, exp -= 32;
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else if (m2)
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m0 = m2, m1 = m3, m2 = 0, m3 = 0, exp -= 2 * 32;
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else if (m3)
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m0 = m3, m1 = 0, m2 = 0, m3 = 0, exp -= 3 * 32;
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else {
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fp->fp_class = FPC_ZERO;
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return;
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}
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}
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/* Now fix any supernormal or remaining subnormal. */
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nrm = FP_1;
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sup = nrm << 1;
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if (m0 >= sup) {
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/*
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* We have a supernormal number. We need to shift it right.
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* We may assume m3==0.
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*/
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for (rsh = 1, top = m0 >> 1; top >= sup; rsh++) /* XXX slow */
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top >>= 1;
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exp += rsh;
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lsh = 32 - rsh;
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m3 = m2 << lsh;
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m2 = (m2 >> rsh) | (m1 << lsh);
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m1 = (m1 >> rsh) | (m0 << lsh);
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m0 = top;
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} else if (m0 < nrm) {
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/*
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* We have a regular denorm (a subnormal number), and need
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* to shift it left.
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*/
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for (lsh = 1, top = m0 << 1; top < nrm; lsh++) /* XXX slow */
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top <<= 1;
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exp -= lsh;
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rsh = 32 - lsh;
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m0 = top | (m1 >> rsh);
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m1 = (m1 << lsh) | (m2 >> rsh);
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m2 = (m2 << lsh) | (m3 >> rsh);
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m3 <<= lsh;
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}
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fp->fp_exp = exp;
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fp->fp_mant[0] = m0;
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fp->fp_mant[1] = m1;
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fp->fp_mant[2] = m2;
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fp->fp_mant[3] = m3;
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}
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/*
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* Concoct a `fresh' Quiet NaN per Appendix N.
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* As a side effect, we set NV (invalid) for the current exceptions.
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*/
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struct fpn *
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fpu_newnan(struct fpemu *fe)
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{
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struct fpn *fp;
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fe->fe_cx |= FPSCR_VXSNAN;
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fp = &fe->fe_f3;
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fp->fp_class = FPC_QNAN;
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fp->fp_sign = 0;
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fp->fp_mant[0] = FP_1 - 1;
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fp->fp_mant[1] = fp->fp_mant[2] = fp->fp_mant[3] = ~0;
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DUMPFPN(FPE_REG, fp);
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return (fp);
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}
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