d3e53912d2
pci_find_rom(), pci_intr_map(9), pci_enumerate_bus(), nor the match predicate passed to pciide_compat_intr_establish() should ever modify their pci_attach_args argument, so make their pci_attach_args arguments const and deal with the fallout throughout the kernel. For the most part, these changes add a 'const' where there was no 'const' before, however, some drivers and MD code used to modify pci_attach_args. Now those drivers either copy their pci_attach_args and modify the copy, or refrain from modifying pci_attach_args: Xen: according to Manuel Bouyer, writing to pci_attach_args in pci_intr_map() was a leftover from Xen 2. Probably a bug. I stopped writing it. I have not tested this change. siside(4): sis_hostbr_match() needlessly wrote to pci_attach_args. Probably a bug. I use a temporary variable. I have not tested this change. slide(4): sl82c105_chip_map() overwrote the caller's pci_attach_args. Probably a bug. Use a local pci_attach_args. I have not tested this change. viaide(4): via_sata_chip_map() and via_sata_chip_map_new() overwrote the caller's pci_attach_args. Probably a bug. Make a local copy of the caller's pci_attach_args and modify the copy. I have not tested this change. While I'm here, make pci_mapreg_submap() static. With these changes in place, I have tested the compilation of these kernels: alpha GENERIC amd64 GENERIC XEN3_DOM0 arc GENERIC atari HADES MILAN-PCIIDE bebox GENERIC cats GENERIC cobalt GENERIC evbarm-eb NSLU2 evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE GUMSTIX HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321 IXDP425 IXM1200 KUROBOX_PRO LUBBOCK MARVELL_NAS NAPPI SHEEVAPLUG SMDK2800 TEAMASA_NPWR TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425 evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3 evbmips64-el XLSATX evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266 OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT hp700 GENERIC i386 ALL XEN3_DOM0 XEN3_DOMU ibmnws GENERIC macppc GENERIC mvmeppc GENERIC netwinder GENERIC ofppc GENERIC prep GENERIC sandpoint GENERIC sgimips GENERIC32_IP2x sparc GENERIC_SUN4U KRUPS sparc64 GENERIC As of Sun Apr 3 15:26:26 CDT 2011, I could not compile these kernels with or without my patches in place: ### evbmips-el GDIUM nbmake: nbmake: don't know how to make /home/dyoung/pristine-nbsd/src/sys/arch/mips/mips/softintr.c. Stop ### evbarm-el MPCSA_GENERIC src/sys/arch/evbarm/conf/MPCSA_GENERIC:318: ds1672rtc*: unknown device `ds1672rtc' ### ia64 GENERIC /tmp/genassym.28085/assym.c: In function 'f111': /tmp/genassym.28085/assym.c:67: error: invalid application of 'sizeof' to incomplete type 'struct pcb' /tmp/genassym.28085/assym.c:76: error: dereferencing pointer to incomplete type ### sgimips GENERIC32_IP3x crmfb.o: In function `crmfb_attach': crmfb.c:(.text+0x2304): undefined reference to `ddc_read_edid' crmfb.c:(.text+0x2304): relocation truncated to fit: R_MIPS_26 against `ddc_read_edid' crmfb.c:(.text+0x234c): undefined reference to `edid_parse' crmfb.c:(.text+0x234c): relocation truncated to fit: R_MIPS_26 against `edid_parse' crmfb.c:(.text+0x2354): undefined reference to `edid_print' crmfb.c:(.text+0x2354): relocation truncated to fit: R_MIPS_26 against `edid_print'
349 lines
10 KiB
C
349 lines
10 KiB
C
/* $NetBSD: pci_machdep.c,v 1.34 2011/04/04 20:37:53 dyoung Exp $ */
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/*
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* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
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* Copyright (c) 1994 Charles M. Hannum. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Charles M. Hannum.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Machine-specific functions for PCI autoconfiguration.
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*
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* On PCs, there are two methods of generating PCI configuration cycles.
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* We try to detect the appropriate mechanism for this machine and set
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* up a few function pointers to access the correct method directly.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.34 2011/04/04 20:37:53 dyoung Exp $");
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/time.h>
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#include <sys/systm.h>
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#include <sys/errno.h>
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#include <sys/extent.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <uvm/uvm_extern.h>
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#define _POWERPC_BUS_DMA_PRIVATE
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <machine/platform.h>
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#include <machine/pnp.h>
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#include <dev/isa/isavar.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/pci/pciconf.h>
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/* 0 == direct 1 == indirect */
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int prep_pci_config_mode = 1;
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extern struct genppc_pci_chipset *genppc_pct;
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extern u_int32_t prep_pci_baseaddr;
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extern u_int32_t prep_pci_basedata;
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static void
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prep_pci_get_chipset_tag_indirect(pci_chipset_tag_t pc)
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{
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pc->pc_conf_v = (void *)pc;
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pc->pc_attach_hook = genppc_pci_indirect_attach_hook;
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pc->pc_bus_maxdevs = prep_pci_bus_maxdevs;
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pc->pc_make_tag = genppc_pci_indirect_make_tag;
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pc->pc_conf_read = genppc_pci_indirect_conf_read;
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pc->pc_conf_write = genppc_pci_indirect_conf_write;
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pc->pc_intr_v = (void *)pc;
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pc->pc_intr_map = prep_pci_intr_map;
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pc->pc_intr_string = genppc_pci_intr_string;
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pc->pc_intr_evcnt = genppc_pci_intr_evcnt;
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pc->pc_intr_establish = genppc_pci_intr_establish;
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pc->pc_intr_disestablish = genppc_pci_intr_disestablish;
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pc->pc_conf_interrupt = genppc_pci_conf_interrupt;
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pc->pc_decompose_tag = genppc_pci_indirect_decompose_tag;
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pc->pc_conf_hook = prep_pci_conf_hook;
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pc->pc_addr = mapiodev(prep_pci_baseaddr, 4);
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pc->pc_data = mapiodev(prep_pci_basedata, 4);
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pc->pc_bus = 0;
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pc->pc_node = 0;
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pc->pc_memt = 0;
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pc->pc_iot = 0;
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}
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void
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prep_pci_get_chipset_tag(pci_chipset_tag_t pc)
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{
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int i;
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i = pci_chipset_tag_type();
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if (i == PCIBridgeIndirect || i == PCIBridgeRS6K) {
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prep_pci_config_mode = 1;
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prep_pci_get_chipset_tag_indirect(pc);
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} else if (i == PCIBridgeDirect) {
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prep_pci_get_chipset_tag_direct(pc);
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prep_pci_config_mode = 0;
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} else
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panic("Unknown PCI chipset tag configuration method");
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}
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int
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prep_pci_bus_maxdevs(void *v, int busno)
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{
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struct genppc_pci_chipset_businfo *pbi;
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prop_object_t busmax;
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pbi = SIMPLEQ_FIRST(&genppc_pct->pc_pbi);
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while (busno--)
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pbi = SIMPLEQ_NEXT(pbi, next);
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if (pbi == NULL)
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return 32;
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busmax = prop_dictionary_get(pbi->pbi_properties,
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"prep-pcibus-maxdevices");
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if (busmax == NULL)
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return 32;
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else
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return prop_number_integer_value(busmax);
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return 32;
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}
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int
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prep_pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp)
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{
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struct genppc_pci_chipset_businfo *pbi;
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prop_dictionary_t dict, devsub;
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prop_object_t pinsub;
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prop_number_t pbus;
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int busno, bus, pin, line, swiz, dev, origdev, i;
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char key[20];
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pin = pa->pa_intrpin;
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line = pa->pa_intrline;
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bus = busno = pa->pa_bus;
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swiz = pa->pa_intrswiz;
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origdev = dev = pa->pa_device;
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i = 0;
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pbi = SIMPLEQ_FIRST(&genppc_pct->pc_pbi);
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while (busno--)
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pbi = SIMPLEQ_NEXT(pbi, next);
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KASSERT(pbi != NULL);
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dict = prop_dictionary_get(pbi->pbi_properties, "prep-pci-intrmap");
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if (dict != NULL)
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i = prop_dictionary_count(dict);
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if (dict == NULL || i == 0) {
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/* We have a non-PReP bus. now it gets hard */
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pbus = prop_dictionary_get(pbi->pbi_properties,
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"prep-pcibus-parent");
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if (pbus == NULL)
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goto bad;
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busno = prop_number_integer_value(pbus);
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pbus = prop_dictionary_get(pbi->pbi_properties,
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"prep-pcibus-rawdevnum");
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dev = prop_number_integer_value(pbus);
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/* now that we know the parent bus, we need to find it's pbi */
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pbi = SIMPLEQ_FIRST(&genppc_pct->pc_pbi);
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while (busno--)
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pbi = SIMPLEQ_NEXT(pbi, next);
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KASSERT(pbi != NULL);
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/* swizzle the pin */
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pin = ((pin + origdev - 1) & 3) + 1;
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/* now we have the pbi, ask for dict again */
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dict = prop_dictionary_get(pbi->pbi_properties,
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"prep-pci-intrmap");
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if (dict == NULL)
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goto bad;
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}
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/* No IRQ used. */
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if (pin == 0)
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goto bad;
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if (pin > 4) {
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aprint_error("pci_intr_map: bad interrupt pin %d\n", pin);
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goto bad;
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}
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sprintf(key, "devfunc-%d", dev);
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devsub = prop_dictionary_get(dict, key);
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if (devsub == NULL)
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goto bad;
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sprintf(key, "pin-%c", 'A' + (pin-1));
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pinsub = prop_dictionary_get(devsub, key);
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if (pinsub == NULL)
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goto bad;
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line = prop_number_integer_value(pinsub);
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/*
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* Section 6.2.4, `Miscellaneous Functions', says that 255 means
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* `unknown' or `no connection' on a PC. We assume that a device with
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* `no connection' either doesn't have an interrupt (in which case the
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* pin number should be 0, and would have been noticed above), or
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* wasn't configured by the BIOS (in which case we punt, since there's
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* no real way we can know how the interrupt lines are mapped in the
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* hardware).
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*
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* XXX
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* Since IRQ 0 is only used by the clock, and we can't actually be sure
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* that the BIOS did its job, we also recognize that as meaning that
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* the BIOS has not configured the device.
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*/
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if (line == 0 || line == 255) {
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aprint_error("pci_intr_map: no mapping for pin %c\n",
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'@' + pin);
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goto bad;
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} else {
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if (line >= ICU_LEN) {
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aprint_error("pci_intr_map: bad interrupt line %d\n",
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line);
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goto bad;
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}
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if (line == IRQ_SLAVE) {
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aprint_verbose("pci_intr_map: changed line 2 to line 9\n");
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line = 9;
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}
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}
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*ihp = line;
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return 0;
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bad:
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*ihp = -1;
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return 1;
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}
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extern pcitag_t prep_pci_direct_make_tag(void *, int, int, int);
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extern pcitag_t genppc_pci_indirect_make_tag(void *, int, int, int);
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extern pcireg_t prep_pci_direct_conf_read(void *, pcitag_t, int);
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extern pcireg_t genppc_pci_indirect_conf_read(void *, pcitag_t, int);
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int
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prep_pci_conf_hook(pci_chipset_tag_t pct, int bus, int dev, int func,
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pcireg_t id)
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{
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struct genppc_pci_chipset_businfo *pbi;
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prop_number_t bmax, pbus;
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pcitag_t tag;
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pcireg_t class;
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/*
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* The P9100 board found in some IBM machines cannot be
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* over-configured.
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*/
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if (PCI_VENDOR(id) == PCI_VENDOR_WEITEK &&
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PCI_PRODUCT(id) == PCI_PRODUCT_WEITEK_P9100)
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return 0;
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/* We have already mapped the MPIC2 if we have one, so leave it
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alone */
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if (PCI_VENDOR(id) == PCI_VENDOR_IBM &&
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PCI_PRODUCT(id) == PCI_PRODUCT_IBM_MPIC2)
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return 0;
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if (PCI_VENDOR(id) == PCI_VENDOR_IBM &&
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PCI_PRODUCT(id) == PCI_PRODUCT_IBM_MPIC)
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return 0;
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if (PCI_VENDOR(id) == PCI_VENDOR_INTEL &&
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PCI_PRODUCT(id) == PCI_PRODUCT_INTEL_PCEB)
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return 0;
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if (PCI_VENDOR(id) == PCI_VENDOR_MOT &&
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PCI_PRODUCT(id) == PCI_PRODUCT_MOT_RAVEN)
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return (PCI_CONF_ALL & ~PCI_CONF_MAP_MEM);
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/* NOTE, all device specific stuff must be above this line */
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/* don't do this on the primary host bridge */
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if (bus == 0 && dev == 0 && func == 0)
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return PCI_CONF_DEFAULT;
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if (prep_pci_config_mode) {
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tag = genppc_pci_indirect_make_tag(pct, bus, dev, func);
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class = genppc_pci_indirect_conf_read(pct, tag,
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PCI_CLASS_REG);
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} else {
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tag = prep_pci_direct_make_tag(pct, bus, dev, func);
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class = prep_pci_direct_conf_read(pct, tag,
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PCI_CLASS_REG);
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}
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/*
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* PCI bridges have special needs. We need to discover where they
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* came from, and wire them appropriately.
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*/
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if (PCI_CLASS(class) == PCI_CLASS_BRIDGE &&
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PCI_SUBCLASS(class) == PCI_SUBCLASS_BRIDGE_PCI) {
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pbi = malloc(sizeof(struct genppc_pci_chipset_businfo),
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M_DEVBUF, M_NOWAIT);
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KASSERT(pbi != NULL);
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pbi->pbi_properties = prop_dictionary_create();
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KASSERT(pbi->pbi_properties != NULL);
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setup_pciintr_map(pbi, bus, dev, func);
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/* record the parent bus, and the parent device number */
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pbus = prop_number_create_integer(bus);
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prop_dictionary_set(pbi->pbi_properties, "prep-pcibus-parent",
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pbus);
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prop_object_release(pbus);
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pbus = prop_number_create_integer(dev);
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prop_dictionary_set(pbi->pbi_properties,
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"prep-pcibus-rawdevnum", pbus);
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prop_object_release(pbus);
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/* now look for bus quirks */
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if (PCI_VENDOR(id) == PCI_VENDOR_DEC &&
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PCI_PRODUCT(id) == PCI_PRODUCT_DEC_21154) {
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bmax = prop_number_create_integer(8);
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KASSERT(bmax != NULL);
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prop_dictionary_set(pbi->pbi_properties,
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"prep-pcibus-maxdevices", bmax);
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prop_object_release(bmax);
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}
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SIMPLEQ_INSERT_TAIL(&genppc_pct->pc_pbi, pbi, next);
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}
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return (PCI_CONF_DEFAULT);
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}
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