269 lines
7.2 KiB
C
269 lines
7.2 KiB
C
/* $NetBSD: otgsc.c,v 1.28 2002/10/02 04:55:52 thorpej Exp $ */
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/*
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* Copyright (c) 1994 Michael L. Hitch
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* Copyright (c) 1982, 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)csa12gdma.c
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: otgsc.c,v 1.28 2002/10/02 04:55:52 thorpej Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <dev/scsipi/scsi_all.h>
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#include <dev/scsipi/scsipi_all.h>
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#include <dev/scsipi/scsiconf.h>
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#include <amiga/amiga/device.h>
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#include <amiga/amiga/isr.h>
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#include <amiga/dev/scireg.h>
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#include <amiga/dev/scivar.h>
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#include <amiga/dev/zbusvar.h>
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void otgscattach(struct device *, struct device *, void *);
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int otgscmatch(struct device *, struct cfdata *, void *);
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int otgsc_dma_xfer_in(struct sci_softc *dev, int len,
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register u_char *buf, int phase);
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int otgsc_dma_xfer_out(struct sci_softc *dev, int len,
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register u_char *buf, int phase);
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int otgsc_intr(void *);
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#ifdef DEBUG
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extern int sci_debug;
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#define QPRINTF(a) if (sci_debug > 1) printf a
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#else
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#define QPRINTF(a)
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#endif
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extern int sci_data_wait;
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CFATTACH_DECL(otgsc, sizeof(struct sci_softc),
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otgscmatch, otgscattach, NULL, NULL);
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/*
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* if we are my Hacker's SCSI board we are here.
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*/
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int
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otgscmatch(struct device *pdp, struct cfdata *cfp, void *auxp)
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{
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struct zbus_args *zap;
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zap = auxp;
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/*
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* Check manufacturer and product id.
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*/
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if (zap->manid == 1058 && zap->prodid == 21)
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return(1);
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else
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return(0);
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}
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void
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otgscattach(struct device *pdp, struct device *dp, void *auxp)
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{
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volatile u_char *rp;
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struct sci_softc *sc = (struct sci_softc *)dp;
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struct zbus_args *zap;
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struct scsipi_adapter *adapt = &sc->sc_adapter;
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struct scsipi_channel *chan = &sc->sc_channel;
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printf("\n");
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zap = auxp;
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sc = (struct sci_softc *)dp;
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rp = (u_char *)zap->va + 0x2000;
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sc->sci_data = rp;
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sc->sci_odata = rp;
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sc->sci_icmd = rp + 0x10;
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sc->sci_mode = rp + 0x20;
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sc->sci_tcmd = rp + 0x30;
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sc->sci_bus_csr = rp + 0x40;
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sc->sci_sel_enb = rp + 0x40;
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sc->sci_csr = rp + 0x50;
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sc->sci_dma_send = rp + 0x50;
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sc->sci_idata = rp + 0x60;
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sc->sci_trecv = rp + 0x60;
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sc->sci_iack = rp + 0x70;
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sc->sci_irecv = rp + 0x70;
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sc->dma_xfer_in = otgsc_dma_xfer_in;
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sc->dma_xfer_out = otgsc_dma_xfer_out;
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sc->sc_isr.isr_intr = otgsc_intr;
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sc->sc_isr.isr_arg = sc;
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sc->sc_isr.isr_ipl = 2;
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add_isr(&sc->sc_isr);
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scireset(sc);
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/*
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* Fill in the scsipi_adapter.
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*/
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memset(adapt, 0, sizeof(*adapt));
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adapt->adapt_dev = &sc->sc_dev;
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adapt->adapt_nchannels = 1;
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adapt->adapt_openings = 7;
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adapt->adapt_max_periph = 1;
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adapt->adapt_request = sci_scsipi_request;
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adapt->adapt_minphys = sci_minphys;
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/*
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* Fill in the scsipi_channel.
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*/
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memset(chan, 0, sizeof(*chan));
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chan->chan_adapter = adapt;
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chan->chan_bustype = &scsi_bustype;
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chan->chan_channel = 0;
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chan->chan_ntargets = 8;
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chan->chan_nluns = 8;
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chan->chan_id = 7;
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/*
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* attach all scsi units on us
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*/
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config_found(dp, chan, scsiprint);
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}
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int
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otgsc_dma_xfer_in(struct sci_softc *dev, int len, register u_char *buf,
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int phase)
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{
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int wait = sci_data_wait;
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volatile register u_char *sci_dma = dev->sci_data + 0x100;
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volatile register u_char *sci_csr = dev->sci_csr;
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#ifdef DEBUG
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u_char *obp = buf;
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#endif
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QPRINTF(("otgsc_dma_in %d, csr=%02x\n", len, *dev->sci_bus_csr));
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*dev->sci_tcmd = phase;
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*dev->sci_mode |= SCI_MODE_DMA;
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*dev->sci_icmd = 0;
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*dev->sci_irecv = 0;
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while (len > 0) {
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wait = sci_data_wait;
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while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
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(SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
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if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
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|| !(*dev->sci_bus_csr & SCI_BUS_BSY)
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|| --wait < 0) {
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#ifdef DEBUG
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if (sci_debug)
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printf("otgsc_dma_in fail: l%d i%x w%d\n",
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len, *dev->sci_bus_csr, wait);
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#endif
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*dev->sci_mode &= ~SCI_MODE_DMA;
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return 0;
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}
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}
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*buf++ = *sci_dma;
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len--;
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}
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QPRINTF(("otgsc_dma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
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len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5],
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obp[6], obp[7], obp[8], obp[9]));
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*dev->sci_mode &= ~SCI_MODE_DMA;
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return 0;
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}
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int
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otgsc_dma_xfer_out(struct sci_softc *dev, int len, register u_char *buf,
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int phase)
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{
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int wait = sci_data_wait;
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volatile register u_char *sci_dma = dev->sci_data + 0x100;
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volatile register u_char *sci_csr = dev->sci_csr;
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QPRINTF(("otgsc_dma_out %d, csr=%02x\n", len, *dev->sci_bus_csr));
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QPRINTF(("otgsc_dma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
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len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5],
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buf[6], buf[7], buf[8], buf[9]));
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*dev->sci_tcmd = phase;
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*dev->sci_mode |= SCI_MODE_DMA;
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*dev->sci_icmd = SCI_ICMD_DATA;
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*dev->sci_dma_send = 0;
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while (len > 0) {
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wait = sci_data_wait;
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while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
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(SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
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if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
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|| !(*dev->sci_bus_csr & SCI_BUS_BSY)
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|| --wait < 0) {
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#ifdef DEBUG
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if (sci_debug)
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printf("otgsc_dma_out fail: l%d i%x w%d\n",
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len, *dev->sci_bus_csr, wait);
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#endif
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*dev->sci_mode &= ~SCI_MODE_DMA;
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return 0;
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}
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}
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*sci_dma = *buf++;
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len--;
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}
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wait = sci_data_wait;
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while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) ==
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SCI_CSR_PHASE_MATCH && --wait);
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*dev->sci_mode &= ~SCI_MODE_DMA;
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return 0;
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}
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int
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otgsc_intr(void *arg)
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{
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struct sci_softc *dev = arg;
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u_char stat;
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if ((*dev->sci_csr & SCI_CSR_INT) == 0)
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return (1);
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stat = *dev->sci_iack;
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*dev->sci_mode = 0;
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return (1);
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}
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