586 lines
14 KiB
C
586 lines
14 KiB
C
/* $NetBSD: tga.c,v 1.19 1997/07/23 08:05:36 cgd Exp $ */
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/*
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* Copyright (c) 1995, 1996 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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#include <machine/options.h> /* Config options headers */
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: tga.c,v 1.19 1997/07/23 08:05:36 cgd Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <sys/buf.h>
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#include <sys/ioctl.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <machine/conf.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcidevs.h>
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#include <machine/tgareg.h>
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#include <alpha/pci/tgavar.h>
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#include <alpha/pci/bt485reg.h>
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#include <dev/rcons/raster.h>
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#include <alpha/wscons/wscons_raster.h>
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#include <alpha/wscons/wsconsvar.h>
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#include <machine/fbio.h>
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#include <machine/autoconf.h>
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#include <machine/pte.h>
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int tgamatch __P((struct device *, struct cfdata *, void *));
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void tgaattach __P((struct device *, struct device *, void *));
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int tgaprint __P((void *, const char *));
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struct cfattach tga_ca = {
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sizeof(struct tga_softc), tgamatch, tgaattach,
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};
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struct cfdriver tga_cd = {
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NULL, "tga", DV_DULL,
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};
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int tga_identify __P((tga_reg_t *));
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const struct tga_conf *tga_getconf __P((int));
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void tga_getdevconfig __P((bus_space_tag_t memt, pci_chipset_tag_t pc,
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pcitag_t tag, struct tga_devconfig *dc));
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struct tga_devconfig tga_console_dc;
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struct wscons_emulfuncs tga_emulfuncs = {
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rcons_cursor, /* could use hardware cursor; punt */
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rcons_putstr,
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rcons_copycols,
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rcons_erasecols,
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rcons_copyrows,
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rcons_eraserows,
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};
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int tgaioctl __P((void *, u_long, caddr_t, int, struct proc *));
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int tgammap __P((void *, off_t, int));
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void tga_blank __P((struct tga_devconfig *));
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void tga_unblank __P((struct tga_devconfig *));
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int
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tgamatch(parent, match, aux)
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struct device *parent;
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struct cfdata *match;
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void *aux;
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{
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struct pci_attach_args *pa = aux;
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if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_DEC ||
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PCI_PRODUCT(pa->pa_id) != PCI_PRODUCT_DEC_21030)
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return (0);
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return (10);
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}
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void
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tga_getdevconfig(memt, pc, tag, dc)
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bus_space_tag_t memt;
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pci_chipset_tag_t pc;
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pcitag_t tag;
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struct tga_devconfig *dc;
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{
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const struct tga_conf *tgac;
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const struct tga_ramdac_conf *tgar;
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struct raster *rap;
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struct rcons *rcp;
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bus_size_t pcisize;
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int i, flags;
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dc->dc_memt = memt;
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dc->dc_pc = pc;
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dc->dc_pcitag = tag;
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/* XXX magic number */
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if (pci_mapreg_info(pc, tag, 0x10,
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PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT,
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&dc->dc_pcipaddr, &pcisize, &flags))
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return;
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if ((flags & BUS_SPACE_MAP_CACHEABLE) == 0) /* XXX */
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panic("tga memory not cacheable");
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if (bus_space_map(memt, dc->dc_pcipaddr, pcisize,
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BUS_SPACE_MAP_CACHEABLE | BUS_SPACE_MAP_LINEAR, &dc->dc_vaddr))
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return;
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dc->dc_paddr = ALPHA_K0SEG_TO_PHYS(dc->dc_vaddr); /* XXX */
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dc->dc_regs = (tga_reg_t *)(dc->dc_vaddr + TGA_MEM_CREGS);
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dc->dc_tga_type = tga_identify(dc->dc_regs);
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tgac = dc->dc_tgaconf = tga_getconf(dc->dc_tga_type);
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if (tgac == NULL)
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return;
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#if 0
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/* XXX on the Alpha, pcisize = 4 * cspace_size. */
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if (tgac->tgac_cspace_size != pcisize) /* sanity */
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panic("tga_getdevconfig: memory size mismatch?");
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#endif
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tgar = tgac->tgac_ramdac;
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switch (dc->dc_regs[TGA_REG_VHCR] & 0x1ff) { /* XXX */
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case 0:
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dc->dc_wid = 8192;
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break;
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case 1:
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dc->dc_wid = 8196;
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break;
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default:
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dc->dc_wid = (dc->dc_regs[TGA_REG_VHCR] & 0x1ff) * 4; /* XXX */
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break;
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}
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dc->dc_rowbytes = dc->dc_wid * (dc->dc_tgaconf->tgac_phys_depth / 8);
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if ((dc->dc_regs[TGA_REG_VHCR] & 0x00000001) != 0 && /* XXX */
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(dc->dc_regs[TGA_REG_VHCR] & 0x80000000) != 0) { /* XXX */
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dc->dc_wid -= 4;
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/*
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* XXX XXX turning off 'odd' shouldn't be necesssary,
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* XXX XXX but i can't make X work with the weird size.
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*/
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dc->dc_regs[TGA_REG_VHCR] &= ~0x80000001;
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dc->dc_rowbytes =
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dc->dc_wid * (dc->dc_tgaconf->tgac_phys_depth / 8);
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}
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dc->dc_ht = (dc->dc_regs[TGA_REG_VVCR] & 0x7ff); /* XXX */
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/* XXX this seems to be what DEC does */
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dc->dc_regs[TGA_REG_CCBR] = 0;
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dc->dc_regs[TGA_REG_VVBR] = 1;
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dc->dc_videobase = dc->dc_vaddr + tgac->tgac_dbuf[0] +
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1 * tgac->tgac_vvbr_units;
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dc->dc_blanked = 1;
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tga_unblank(dc);
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/*
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* Set all bits in the pixel mask, to enable writes to all pixels.
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* It seems that the console firmware clears some of them
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* under some circumstances, which causes cute vertical stripes.
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*/
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dc->dc_regs[TGA_REG_GPXR_P] = 0xffffffff;
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/* clear the screen */
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for (i = 0; i < dc->dc_ht * dc->dc_rowbytes; i += sizeof(u_int32_t))
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*(u_int32_t *)(dc->dc_videobase + i) = 0;
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/* initialize the raster */
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rap = &dc->dc_raster;
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rap->width = dc->dc_wid;
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rap->height = dc->dc_ht;
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rap->depth = tgac->tgac_phys_depth;
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rap->linelongs = dc->dc_rowbytes / sizeof(u_int32_t);
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rap->pixels = (u_int32_t *)dc->dc_videobase;
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/* initialize the raster console blitter */
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rcp = &dc->dc_rcons;
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rcp->rc_sp = rap;
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rcp->rc_crow = rcp->rc_ccol = -1;
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rcp->rc_crowp = &rcp->rc_crow;
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rcp->rc_ccolp = &rcp->rc_ccol;
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rcons_init(rcp, 34, 80);
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}
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void
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tgaattach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct pci_attach_args *pa = aux;
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struct tga_softc *sc = (struct tga_softc *)self;
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struct wscons_attach_args waa;
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struct wscons_odev_spec *wo;
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pci_intr_handle_t intrh;
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const char *intrstr;
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u_int8_t rev;
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int console;
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console = (pa->pa_tag == tga_console_dc.dc_pcitag);
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if (console)
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sc->sc_dc = &tga_console_dc;
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else {
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sc->sc_dc = (struct tga_devconfig *)
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malloc(sizeof(struct tga_devconfig), M_DEVBUF, M_WAITOK);
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tga_getdevconfig(pa->pa_memt, pa->pa_pc, pa->pa_tag, sc->sc_dc);
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}
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if (sc->sc_dc->dc_vaddr == NULL) {
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printf(": couldn't map memory space; punt!\n");
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return;
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}
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/* XXX say what's going on. */
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intrstr = NULL;
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if (sc->sc_dc->dc_tgaconf->tgac_ramdac->tgar_intr != NULL) {
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if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin,
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pa->pa_intrline, &intrh)) {
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printf(": couldn't map interrupt");
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return;
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}
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intrstr = pci_intr_string(pa->pa_pc, intrh);
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sc->sc_intr = pci_intr_establish(pa->pa_pc, intrh, IPL_TTY,
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sc->sc_dc->dc_tgaconf->tgac_ramdac->tgar_intr, sc->sc_dc);
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if (sc->sc_intr == NULL) {
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printf(": couldn't establish interrupt");
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if (intrstr != NULL)
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printf("at %s", intrstr);
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printf("\n");
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return;
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}
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}
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/*
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* Initialize the RAMDAC and allocate any private storage it needs.
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* Initialization includes disabling cursor, setting a sane
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* colormap, etc.
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*/
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(*sc->sc_dc->dc_tgaconf->tgac_ramdac->tgar_init)(sc->sc_dc, 1);
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printf(": DC21030 ");
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rev = PCI_REVISION(pa->pa_class);
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switch (rev) {
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case 1: case 2: case 3:
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printf("step %c", 'A' + rev - 1);
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break;
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default:
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printf("unknown stepping (0x%x)", rev);
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break;
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}
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printf(", ");
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if (sc->sc_dc->dc_tgaconf == NULL) {
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printf("unknown board configuration\n");
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return;
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}
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printf("board type %s\n", sc->sc_dc->dc_tgaconf->tgac_name);
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printf("%s: %d x %d, %dbpp, %s RAMDAC\n", sc->sc_dev.dv_xname,
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sc->sc_dc->dc_wid, sc->sc_dc->dc_ht,
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sc->sc_dc->dc_tgaconf->tgac_phys_depth,
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sc->sc_dc->dc_tgaconf->tgac_ramdac->tgar_name);
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if (intrstr != NULL)
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printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname,
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intrstr);
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waa.waa_isconsole = console;
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wo = &waa.waa_odev_spec;
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wo->wo_emulfuncs = &tga_emulfuncs;
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wo->wo_emulfuncs_cookie = &sc->sc_dc->dc_rcons;
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wo->wo_ioctl = tgaioctl;
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wo->wo_mmap = tgammap;
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wo->wo_miscfuncs_cookie = sc;
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wo->wo_nrows = sc->sc_dc->dc_rcons.rc_maxrow;
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wo->wo_ncols = sc->sc_dc->dc_rcons.rc_maxcol;
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wo->wo_crow = 0;
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wo->wo_ccol = 0;
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config_found(self, &waa, tgaprint);
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}
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int
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tgaprint(aux, pnp)
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void *aux;
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const char *pnp;
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{
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if (pnp)
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printf("wscons at %s", pnp);
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return (UNCONF);
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}
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int
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tgaioctl(v, cmd, data, flag, p)
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void *v;
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u_long cmd;
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caddr_t data;
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int flag;
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struct proc *p;
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{
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struct tga_softc *sc = v;
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struct tga_devconfig *dc = sc->sc_dc;
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const struct tga_ramdac_conf *tgar = dc->dc_tgaconf->tgac_ramdac;
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switch (cmd) {
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case FBIOGTYPE:
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#define fbt ((struct fbtype *)data)
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fbt->fb_type = FBTYPE_TGA;
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fbt->fb_height = sc->sc_dc->dc_ht;
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fbt->fb_width = sc->sc_dc->dc_wid;
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fbt->fb_depth = sc->sc_dc->dc_tgaconf->tgac_phys_depth;
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fbt->fb_cmsize = 256; /* XXX ??? */
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fbt->fb_size = sc->sc_dc->dc_tgaconf->tgac_cspace_size;
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#undef fbt
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return (0);
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case FBIOPUTCMAP:
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return (*tgar->tgar_set_cmap)(dc, (struct fbcmap *)data);
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case FBIOGETCMAP:
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return (*tgar->tgar_get_cmap)(dc, (struct fbcmap *)data);
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case FBIOGATTR:
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return (ENOTTY); /* XXX ? */
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case FBIOSVIDEO:
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if (*(int *)data == FBVIDEO_OFF)
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tga_blank(sc->sc_dc);
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else
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tga_unblank(sc->sc_dc);
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return (0);
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case FBIOGVIDEO:
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*(int *)data = dc->dc_blanked ? FBVIDEO_OFF : FBVIDEO_ON;
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return (0);
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case FBIOSCURSOR:
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return (*tgar->tgar_set_cursor)(dc, (struct fbcursor *)data);
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case FBIOGCURSOR:
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return (*tgar->tgar_get_cursor)(dc, (struct fbcursor *)data);
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case FBIOSCURPOS:
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return (*tgar->tgar_set_curpos)(dc, (struct fbcurpos *)data);
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case FBIOGCURPOS:
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return (*tgar->tgar_get_curpos)(dc, (struct fbcurpos *)data);
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case FBIOGCURMAX:
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return (*tgar->tgar_get_curmax)(dc, (struct fbcurpos *)data);
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}
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return (-1);
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}
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int
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tgammap(v, offset, prot)
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void *v;
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off_t offset;
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int prot;
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{
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struct tga_softc *sc = v;
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if (offset > sc->sc_dc->dc_tgaconf->tgac_cspace_size)
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return -1;
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return alpha_btop(sc->sc_dc->dc_paddr + offset);
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}
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void
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tga_console(iot, memt, pc, bus, device, function)
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bus_space_tag_t iot, memt;
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pci_chipset_tag_t pc;
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int bus, device, function;
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{
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struct tga_devconfig *dcp = &tga_console_dc;
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struct wscons_odev_spec wo;
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tga_getdevconfig(memt, pc, pci_make_tag(pc, bus, device, function), dcp);
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/* sanity checks */
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if (dcp->dc_vaddr == NULL)
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panic("tga_console(%d, %d): couldn't map memory space",
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device, function);
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if (dcp->dc_tgaconf == NULL)
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panic("tga_console(%d, %d): unknown board configuration",
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device, function);
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/*
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* Initialize the RAMDAC but DO NOT allocate any private storage.
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* Initialization includes disabling cursor, setting a sane
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* colormap, etc. It will be reinitialized in tgaattach().
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*/
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(*dcp->dc_tgaconf->tgac_ramdac->tgar_init)(dcp, 0);
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wo.wo_emulfuncs = &tga_emulfuncs;
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wo.wo_emulfuncs_cookie = &dcp->dc_rcons;
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/* ioctl and mmap are unused until real attachment. */
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wo.wo_nrows = dcp->dc_rcons.rc_maxrow;
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wo.wo_ncols = dcp->dc_rcons.rc_maxcol;
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wo.wo_crow = 0;
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wo.wo_ccol = 0;
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wscons_attach_console(&wo);
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}
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/*
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* Functions to blank and unblank the display.
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*/
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void
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tga_blank(dc)
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struct tga_devconfig *dc;
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{
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if (!dc->dc_blanked) {
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dc->dc_blanked = 1;
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dc->dc_regs[TGA_REG_VVVR] |= 0x02; /* XXX */
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}
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}
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void
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tga_unblank(dc)
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struct tga_devconfig *dc;
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{
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if (dc->dc_blanked) {
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dc->dc_blanked = 0;
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dc->dc_regs[TGA_REG_VVVR] &= ~0x02; /* XXX */
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}
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}
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/*
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* Functions to manipulate the built-in cursor handing hardware.
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*/
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int
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tga_builtin_set_cursor(dc, fbc)
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struct tga_devconfig *dc;
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struct fbcursor *fbc;
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{
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int v;
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#if 0
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int count;
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#endif
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v = fbc->set;
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#if 0
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if (v & FB_CUR_SETCMAP) /* XXX should be supported */
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return EINVAL;
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if (v & FB_CUR_SETSHAPE) {
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|
if ((u_int)fbc->size.x != 64 || (u_int)fbc->size.y > 64)
|
|
return (EINVAL);
|
|
/* The cursor is 2 bits deep, and there is no mask */
|
|
count = (fbc->size.y * 64 * 2) / NBBY;
|
|
if (!useracc(fbc->image, count, B_READ))
|
|
return (EFAULT);
|
|
}
|
|
if (v & FB_CUR_SETHOT) /* not supported */
|
|
return EINVAL;
|
|
#endif
|
|
|
|
/* parameters are OK; do it */
|
|
if (v & FB_CUR_SETCUR) {
|
|
if (fbc->enable)
|
|
dc->dc_regs[TGA_REG_VVVR] |= 0x04; /* XXX */
|
|
else
|
|
dc->dc_regs[TGA_REG_VVVR] &= ~0x04; /* XXX */
|
|
}
|
|
#if 0
|
|
if (v & FB_CUR_SETPOS) {
|
|
dc->dc_regs[TGA_REG_CXYR] =
|
|
((fbc->pos.y & 0xfff) << 12) | (fbc->pos.x & 0xfff);
|
|
}
|
|
if (v & FB_CUR_SETCMAP) {
|
|
/* XXX */
|
|
}
|
|
if (v & FB_CUR_SETSHAPE) {
|
|
dc->dc_regs[TGA_REG_CCBR] =
|
|
(dc->dc_regs[TGA_REG_CCBR] & ~0xfc00) | (fbc->size.y << 10);
|
|
copyin(fbc->image, (char *)(dc->dc_vaddr +
|
|
(dc->dc_regs[TGA_REG_CCBR] & 0x3ff)),
|
|
count); /* can't fail. */
|
|
}
|
|
#endif
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
tga_builtin_get_cursor(dc, fbc)
|
|
struct tga_devconfig *dc;
|
|
struct fbcursor *fbc;
|
|
{
|
|
int count, error;
|
|
|
|
fbc->set = FB_CUR_SETALL & ~(FB_CUR_SETHOT | FB_CUR_SETCMAP);
|
|
fbc->enable = (dc->dc_regs[TGA_REG_VVVR] & 0x04) != 0;
|
|
fbc->pos.x = dc->dc_regs[TGA_REG_CXYR] & 0xfff;
|
|
fbc->pos.y = (dc->dc_regs[TGA_REG_CXYR] >> 12) & 0xfff;
|
|
fbc->size.x = 64;
|
|
fbc->size.y = (dc->dc_regs[TGA_REG_CCBR] >> 10) & 0x3f;
|
|
|
|
if (fbc->image != NULL) {
|
|
count = (fbc->size.y * 64 * 2) / NBBY;
|
|
error = copyout((char *)(dc->dc_vaddr +
|
|
(dc->dc_regs[TGA_REG_CCBR] & 0x3ff)),
|
|
fbc->image, count);
|
|
if (error)
|
|
return (error);
|
|
/* No mask */
|
|
}
|
|
/* XXX No color map */
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
tga_builtin_set_curpos(dc, fbp)
|
|
struct tga_devconfig *dc;
|
|
struct fbcurpos *fbp;
|
|
{
|
|
|
|
dc->dc_regs[TGA_REG_CXYR] =
|
|
((fbp->y & 0xfff) << 12) | (fbp->x & 0xfff);
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
tga_builtin_get_curpos(dc, fbp)
|
|
struct tga_devconfig *dc;
|
|
struct fbcurpos *fbp;
|
|
{
|
|
|
|
fbp->x = dc->dc_regs[TGA_REG_CXYR] & 0xfff;
|
|
fbp->y = (dc->dc_regs[TGA_REG_CXYR] >> 12) & 0xfff;
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
tga_builtin_get_curmax(dc, fbp)
|
|
struct tga_devconfig *dc;
|
|
struct fbcurpos *fbp;
|
|
{
|
|
|
|
fbp->x = fbp->y = 64;
|
|
return (0);
|
|
}
|