kiyohara 068a6eb9af Add Marvell CESA(Cryptographic Engines and Security Accelerator) module driver. ...

But support only PIO-mode now.  Also AES-CBC not supported.
 Don't know how to process to AES CBC in PIO-mode. I haven't found IV registers.

2012-07-27 03:00:01 +00:00

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com_mv.c

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ehci_mv.c

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files.discovery

Add Marvell CESA(Cryptographic Engines and Security Accelerator) module driver.

2012-07-27 03:00:01 +00:00

gt.c

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gtbrgreg.h

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gtbrgvar.h

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gtdevbusvar.h

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gtethreg.h

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gtidmac.c

Support Kirkwoods. Kirkwoods has 4ch for XORE and not has IDMAC. tested on OpenBlockS A6 with ch0 only.

2012-07-23 06:09:47 +00:00

gtidmacreg.h

Support Kirkwoods. Kirkwoods has 4ch for XORE and not has IDMAC. tested on OpenBlockS A6 with ch0 only.

2012-07-23 06:09:47 +00:00

gtidmacvar.h

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gtintrreg.h

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gtintrvar.h

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gtmpsc.c

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gtmpscreg.h

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gtmpscvar.h

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gtpci.c

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gtpcireg.h

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gtpcivar.h

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gtreg.h

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gtsdmareg.h

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gtsdmavar.h

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gttwsi.c

Don't send a stop bit immediately after start bit transmission.

2012-07-21 04:21:14 +00:00

gttwsireg.h

TWSI size is 0x100. Not 0x1000.

2012-07-21 04:23:16 +00:00

gtvar.h

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if_gfe.c

Fix mii_statchg to take a 'struct ifnet *' instead of device_t. This fixes

2012-07-22 14:32:49 +00:00

if_gfevar.h

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if_mvgbe.c

Fix mii_statchg to take a 'struct ifnet *' instead of device_t. This fixes

2012-07-22 14:32:49 +00:00

marvellreg.h

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marvellvar.h

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mvcesa.c

Add Marvell CESA(Cryptographic Engines and Security Accelerator) module driver.

2012-07-27 03:00:01 +00:00

mvcesareg.h

Add Marvell CESA(Cryptographic Engines and Security Accelerator) module driver.

2012-07-27 03:00:01 +00:00

mvgbereg.h

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mvpex.c

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mvpexreg.h

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mvpexvar.h

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mvsata_mv.c

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mvsdio.c

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mvsdioreg.h

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obio.c

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pchb.c

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