746 lines
22 KiB
C
746 lines
22 KiB
C
/* $NetBSD: au_wired_space.c,v 1.5 2007/03/04 06:00:11 christos Exp $ */
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/*-
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* Copyright (c) 2006 Itronix Inc.
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* All rights reserved.
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*
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* Written by Garrett D'Amore for Itronix Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of Itronix Inc. may not be used to endorse
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* or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace
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* Simulation Facility, NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: au_wired_space.c,v 1.5 2007/03/04 06:00:11 christos Exp $");
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/*
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* This provides mappings for the upper I/O regions used on some
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* Alchemy parts, e.g. PCI and PCMCIA spaces. These spaces can be
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* accessed using wired TLB entries.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/extent.h>
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#include <sys/malloc.h>
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#include <sys/endian.h>
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#include <machine/bus.h>
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#include <machine/locore.h>
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#include <machine/wired_map.h>
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#include <mips/alchemy/include/au_wired_space.h>
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#ifndef AU_WIRED_EXTENT_SZ
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#define AU_WIRED_EXTENT_SZ EXTENT_FIXED_STORAGE_SIZE(10)
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#endif
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typedef struct au_wired_cookie {
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const char *c_name;
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bus_addr_t c_start;
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bus_size_t c_size;
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paddr_t c_pbase;
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int c_flags;
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int c_swswap;
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bool c_hwswap;
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struct extent *c_extent;
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long c_exstore[AU_WIRED_EXTENT_SZ/sizeof (long)];
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} au_wired_cookie_t;
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int au_wired_map(void *, bus_addr_t, bus_size_t, int,
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bus_space_handle_t *, int);
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void au_wired_unmap(void *, bus_space_handle_t, bus_size_t, int);
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void *au_wired_vaddr(void *, bus_space_handle_t);
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int au_wired_subregion(void *, bus_space_handle_t, bus_size_t, bus_size_t,
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bus_space_handle_t *);
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paddr_t au_wired_mmap(void *, bus_addr_t, off_t, int, int);
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int au_wired_alloc(void *, bus_addr_t, bus_addr_t, bus_size_t, bus_size_t,
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bus_size_t, int, bus_addr_t *, bus_space_handle_t *);
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void au_wired_free(void *, bus_space_handle_t, bus_size_t);
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void au_wired_barrier(void *, bus_space_handle_t, bus_size_t, bus_size_t, int);
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uint8_t au_wired_r_1(void *, bus_space_handle_t, bus_size_t);
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uint16_t au_wired_r_2(void *, bus_space_handle_t, bus_size_t);
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uint32_t au_wired_r_4(void *, bus_space_handle_t, bus_size_t);
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uint64_t au_wired_r_8(void *, bus_space_handle_t, bus_size_t);
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void au_wired_rm_1(void *, bus_space_handle_t, bus_size_t, uint8_t *,
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bus_size_t);
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void au_wired_rm_2(void *, bus_space_handle_t, bus_size_t, uint16_t *,
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bus_size_t);
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void au_wired_rm_4(void *, bus_space_handle_t, bus_size_t, uint32_t *,
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bus_size_t);
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void au_wired_rm_8(void *, bus_space_handle_t, bus_size_t, uint64_t *,
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bus_size_t);
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void au_wired_rr_1(void *, bus_space_handle_t, bus_size_t, uint8_t *,
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bus_size_t);
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void au_wired_rr_2(void *, bus_space_handle_t, bus_size_t, uint16_t *,
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bus_size_t);
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void au_wired_rr_4(void *, bus_space_handle_t, bus_size_t, uint32_t *,
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bus_size_t);
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void au_wired_rr_8(void *, bus_space_handle_t, bus_size_t, uint64_t *,
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bus_size_t);
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void au_wired_w_1(void *, bus_space_handle_t, bus_size_t, uint8_t);
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void au_wired_w_2(void *, bus_space_handle_t, bus_size_t, uint16_t);
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void au_wired_w_4(void *, bus_space_handle_t, bus_size_t, uint32_t);
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void au_wired_w_8(void *, bus_space_handle_t, bus_size_t, uint64_t);
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void au_wired_wm_1(void *, bus_space_handle_t, bus_size_t, const uint8_t *,
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bus_size_t);
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void au_wired_wm_2(void *, bus_space_handle_t, bus_size_t, const uint16_t *,
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bus_size_t);
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void au_wired_wm_4(void *, bus_space_handle_t, bus_size_t, const uint32_t *,
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bus_size_t);
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void au_wired_wm_8(void *, bus_space_handle_t, bus_size_t, const uint64_t *,
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bus_size_t);
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void au_wired_wr_1(void *, bus_space_handle_t, bus_size_t, const uint8_t *,
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bus_size_t);
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void au_wired_wr_2(void *, bus_space_handle_t, bus_size_t, const uint16_t *,
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bus_size_t);
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void au_wired_wr_4(void *, bus_space_handle_t, bus_size_t, const uint32_t *,
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bus_size_t);
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void au_wired_wr_8(void *, bus_space_handle_t, bus_size_t, const uint64_t *,
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bus_size_t);
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void au_wired_sm_1(void *, bus_space_handle_t, bus_size_t, uint8_t,
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bus_size_t);
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void au_wired_sm_2(void *, bus_space_handle_t, bus_size_t, uint16_t,
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bus_size_t);
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void au_wired_sm_4(void *, bus_space_handle_t, bus_size_t, uint32_t,
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bus_size_t);
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void au_wired_sm_8(void *, bus_space_handle_t, bus_size_t, uint64_t,
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bus_size_t);
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void au_wired_sr_1(void *, bus_space_handle_t, bus_size_t, uint8_t,
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bus_size_t);
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void au_wired_sr_2(void *, bus_space_handle_t, bus_size_t, uint16_t,
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bus_size_t);
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void au_wired_sr_4(void *, bus_space_handle_t, bus_size_t, uint32_t,
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bus_size_t);
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void au_wired_sr_8(void *, bus_space_handle_t, bus_size_t, uint64_t,
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bus_size_t);
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void au_wired_c_1(void *, bus_space_handle_t, bus_size_t,
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bus_space_handle_t, bus_size_t, bus_size_t);
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void au_wired_c_2(void *, bus_space_handle_t, bus_size_t,
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bus_space_handle_t, bus_size_t, bus_size_t);
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void au_wired_c_4(void *, bus_space_handle_t, bus_size_t,
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bus_space_handle_t, bus_size_t, bus_size_t);
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void au_wired_c_8(void *, bus_space_handle_t, bus_size_t,
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bus_space_handle_t, bus_size_t, bus_size_t);
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uint16_t au_wired_rs_2(void *, bus_space_handle_t, bus_size_t);
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uint32_t au_wired_rs_4(void *, bus_space_handle_t, bus_size_t);
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uint64_t au_wired_rs_8(void *, bus_space_handle_t, bus_size_t);
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void au_wired_ws_2(void *, bus_space_handle_t, bus_size_t, uint16_t);
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void au_wired_ws_4(void *, bus_space_handle_t, bus_size_t, uint32_t);
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void au_wired_ws_8(void *, bus_space_handle_t, bus_size_t, uint64_t);
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void au_wired_rms_2(void *, bus_space_handle_t, bus_size_t, uint16_t *,
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bus_size_t);
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void au_wired_rms_4(void *, bus_space_handle_t, bus_size_t, uint32_t *,
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bus_size_t);
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void au_wired_rms_8(void *, bus_space_handle_t, bus_size_t, uint64_t *,
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bus_size_t);
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void au_wired_rrs_2(void *, bus_space_handle_t, bus_size_t, uint16_t *,
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bus_size_t);
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void au_wired_rrs_4(void *, bus_space_handle_t, bus_size_t, uint32_t *,
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bus_size_t);
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void au_wired_rrs_8(void *, bus_space_handle_t, bus_size_t, uint64_t *,
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bus_size_t);
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void au_wired_wms_2(void *, bus_space_handle_t, bus_size_t, const uint16_t *,
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bus_size_t);
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void au_wired_wms_4(void *, bus_space_handle_t, bus_size_t, const uint32_t *,
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bus_size_t);
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void au_wired_wms_8(void *, bus_space_handle_t, bus_size_t, const uint64_t *,
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bus_size_t);
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void au_wired_wrs_2(void *, bus_space_handle_t, bus_size_t, const uint16_t *,
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bus_size_t);
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void au_wired_wrs_4(void *, bus_space_handle_t, bus_size_t, const uint32_t *,
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bus_size_t);
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void au_wired_wrs_8(void *, bus_space_handle_t, bus_size_t, const uint64_t *,
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bus_size_t);
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int
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au_wired_map(void *cookie, bus_addr_t addr, bus_size_t size,
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int flags, bus_space_handle_t *bshp, int acct)
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{
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int err;
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au_wired_cookie_t *c = (au_wired_cookie_t *)cookie;
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paddr_t pa;
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/* make sure we can map this bus address */
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if (addr < c->c_start ||
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addr + size > c->c_start + c->c_size)
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return EINVAL;
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pa = c->c_pbase + (addr - c->c_start);
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if (!mips3_wired_enter_region(addr, pa, size))
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return ENOMEM;
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/*
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* bus addresses are taken from virtual address space.
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*/
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if (acct && c->c_extent != NULL) {
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err = extent_alloc_region(c->c_extent, addr, size, EX_NOWAIT);
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if (err)
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return err;
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}
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*bshp = addr;
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return 0;
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}
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void
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au_wired_unmap(void *cookie, bus_space_handle_t bsh, bus_size_t size, int acct)
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{
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au_wired_cookie_t *c = (au_wired_cookie_t *)cookie;
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if (acct != 0 && c->c_extent != NULL) {
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extent_free(c->c_extent, (vaddr_t)bsh, size, EX_NOWAIT);
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}
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}
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int
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au_wired_subregion(void *cookie, bus_space_handle_t bsh,
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bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
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{
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*nbshp = bsh + offset;
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return 0;
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}
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void *
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au_wired_vaddr(void *cookie, bus_space_handle_t bsh)
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{
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return ((void *)bsh);
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}
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paddr_t
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au_wired_mmap(void *cookie, bus_addr_t addr, off_t off, int prot, int flags)
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{
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au_wired_cookie_t *c = (au_wired_cookie_t *)cookie;
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/* I/O spaces should not be directly mmap'ed */
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if (c->c_flags & AU_WIRED_SPACE_IO)
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return -1;
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if (addr < c->c_start || (addr + off) >= (c->c_start + c->c_size))
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return -1;
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return mips_btop(c->c_pbase + (addr - c->c_start) + off);
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}
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int
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au_wired_alloc(void *cookie, bus_addr_t start, bus_addr_t end,
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bus_size_t size, bus_size_t align, bus_size_t boundary, int flags,
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bus_addr_t *addrp, bus_space_handle_t *bshp)
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{
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au_wired_cookie_t *c = (au_wired_cookie_t *)cookie;
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vaddr_t addr;
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int err;
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paddr_t pa;
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if (c->c_extent == NULL)
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panic("au_wired_alloc: extent map %s not avail", c->c_name);
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if (start < c->c_start || ((start + size) > (c->c_start + c->c_size)))
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return EINVAL;
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err = extent_alloc_subregion(c->c_extent, start, end, size,
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align, boundary, EX_FAST | EX_NOWAIT, &addr);
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if (err)
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return err;
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pa = c->c_pbase + (addr - c->c_start);
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if (!mips3_wired_enter_region(addr, pa, size))
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return ENOMEM;
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*bshp = addr;
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*addrp = addr;
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return 0;
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}
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void
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au_wired_free(void *cookie, bus_space_handle_t bsh, bus_size_t size)
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{
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/* unmap takes care of it all */
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au_wired_unmap(cookie, bsh, size, 1);
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}
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inline void
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au_wired_barrier(void *cookie, bus_space_handle_t bsh, bus_size_t o,
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bus_size_t l, int f)
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{
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if (f & BUS_SPACE_BARRIER_WRITE)
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wbflush();
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}
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inline uint8_t
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au_wired_r_1(void *v, bus_space_handle_t h, bus_size_t o)
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{
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return (*(volatile uint8_t *)(h + o));
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}
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inline uint16_t
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au_wired_r_2(void *v, bus_space_handle_t h, bus_size_t o)
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{
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uint16_t val = (*(volatile uint16_t *)(h + o));
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au_wired_cookie_t *c = (au_wired_cookie_t *)v;
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return (c->c_swswap ? bswap16(val) : val);
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}
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inline uint32_t
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au_wired_r_4(void *v, bus_space_handle_t h, bus_size_t o)
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{
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uint32_t val = (*(volatile uint32_t *)(h + o));
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au_wired_cookie_t *c = (au_wired_cookie_t *)v;
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return (c->c_swswap ? bswap32(val) : val);
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}
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inline uint64_t
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au_wired_r_8(void *v, bus_space_handle_t h, bus_size_t o)
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{
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uint64_t val = (*(volatile uint64_t *)(h + o));
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au_wired_cookie_t *c = (au_wired_cookie_t *)v;
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return (c->c_swswap ? bswap64(val) : val);
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}
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inline void
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au_wired_w_1(void *v, bus_space_handle_t h, bus_size_t o, uint8_t val)
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{
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*(volatile uint8_t *)(h + o) = val;
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}
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inline void
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au_wired_w_2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t val)
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{
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au_wired_cookie_t *c = (au_wired_cookie_t *)v;
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*(volatile uint16_t *)(h + o) = c->c_swswap ? bswap16(val) : val;
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}
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inline void
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au_wired_w_4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t val)
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{
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au_wired_cookie_t *c = (au_wired_cookie_t *)v;
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*(volatile uint32_t *)(h + o) = c->c_swswap ? bswap32(val) : val;
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}
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inline void
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au_wired_w_8(void *v, bus_space_handle_t h, bus_size_t o, uint64_t val)
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{
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au_wired_cookie_t *c = (au_wired_cookie_t *)v;
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*(volatile uint64_t *)(h + o) = c->c_swswap ? bswap64(val) : val;
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}
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inline uint16_t
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au_wired_rs_2(void *v, bus_space_handle_t h, bus_size_t o)
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{
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uint16_t val = (*(volatile uint16_t *)(h + o));
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au_wired_cookie_t *c = (au_wired_cookie_t *)v;
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|
|
|
return (c->c_hwswap ? bswap16(val) : val);
|
|
}
|
|
|
|
inline uint32_t
|
|
au_wired_rs_4(void *v, bus_space_handle_t h, bus_size_t o)
|
|
{
|
|
uint32_t val = (*(volatile uint32_t *)(h + o));
|
|
au_wired_cookie_t *c = (au_wired_cookie_t *)v;
|
|
|
|
return (c->c_hwswap ? bswap32(val) : val);
|
|
}
|
|
|
|
inline uint64_t
|
|
au_wired_rs_8(void *v, bus_space_handle_t h, bus_size_t o)
|
|
{
|
|
uint64_t val = (*(volatile uint64_t *)(h + o));
|
|
au_wired_cookie_t *c = (au_wired_cookie_t *)v;
|
|
|
|
return (c->c_hwswap ? bswap64(val) : val);
|
|
}
|
|
|
|
inline void
|
|
au_wired_ws_2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t val)
|
|
{
|
|
au_wired_cookie_t *c = (au_wired_cookie_t *)v;
|
|
|
|
*(volatile uint16_t *)(h + o) = c->c_hwswap ? bswap16(val) : val;
|
|
}
|
|
|
|
inline void
|
|
au_wired_ws_4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t val)
|
|
{
|
|
au_wired_cookie_t *c = (au_wired_cookie_t *)v;
|
|
|
|
*(volatile uint32_t *)(h + o) = c->c_hwswap ? bswap32(val) : val;
|
|
}
|
|
|
|
inline void
|
|
au_wired_ws_8(void *v, bus_space_handle_t h, bus_size_t o, uint64_t val)
|
|
{
|
|
au_wired_cookie_t *c = (au_wired_cookie_t *)v;
|
|
|
|
*(volatile uint64_t *)(h + o) = c->c_hwswap ? bswap64(val) : val;
|
|
}
|
|
|
|
#define AU_WIRED_RM(TYPE,BYTES) \
|
|
void \
|
|
__CONCAT(au_wired_rm_,BYTES)(void *v, \
|
|
bus_space_handle_t h, bus_size_t o, TYPE *dst, bus_size_t cnt) \
|
|
{ \
|
|
\
|
|
while (cnt-- > 0) \
|
|
*dst ++ = __CONCAT(au_wired_r_,BYTES)(v, h, o); \
|
|
}
|
|
AU_WIRED_RM(uint8_t,1)
|
|
AU_WIRED_RM(uint16_t,2)
|
|
AU_WIRED_RM(uint32_t,4)
|
|
AU_WIRED_RM(uint64_t,8)
|
|
|
|
#define AU_WIRED_RMS(TYPE,BYTES) \
|
|
void \
|
|
__CONCAT(au_wired_rms_,BYTES)(void *v, \
|
|
bus_space_handle_t h, bus_size_t o, TYPE *dst, bus_size_t cnt) \
|
|
{ \
|
|
\
|
|
while (cnt-- > 0) { \
|
|
wbflush(); \
|
|
*dst++ = __CONCAT(au_wired_rs_,BYTES)(v, h, o); \
|
|
} \
|
|
}
|
|
AU_WIRED_RMS(uint16_t,2)
|
|
AU_WIRED_RMS(uint32_t,4)
|
|
AU_WIRED_RMS(uint64_t,8)
|
|
|
|
#define AU_WIRED_RR(TYPE,BYTES) \
|
|
void \
|
|
__CONCAT(au_wired_rr_,BYTES)(void *v, \
|
|
bus_space_handle_t h, bus_size_t o, TYPE *dst, bus_size_t cnt) \
|
|
{ \
|
|
\
|
|
while (cnt-- > 0) { \
|
|
*dst++ = __CONCAT(au_wired_r_,BYTES)(v, h, o); \
|
|
o += BYTES; \
|
|
} \
|
|
}
|
|
AU_WIRED_RR(uint8_t,1)
|
|
AU_WIRED_RR(uint16_t,2)
|
|
AU_WIRED_RR(uint32_t,4)
|
|
AU_WIRED_RR(uint64_t,8)
|
|
|
|
#define AU_WIRED_RRS(TYPE,BYTES) \
|
|
void \
|
|
__CONCAT(au_wired_rrs_,BYTES)(void *v, \
|
|
bus_space_handle_t h, bus_size_t o, TYPE *dst, bus_size_t cnt) \
|
|
{ \
|
|
\
|
|
while (cnt-- > 0) { \
|
|
*dst++ = __CONCAT(au_wired_rs_,BYTES)(v, h, o); \
|
|
o += BYTES; \
|
|
} \
|
|
}
|
|
AU_WIRED_RRS(uint16_t,2)
|
|
AU_WIRED_RRS(uint32_t,4)
|
|
AU_WIRED_RRS(uint64_t,8)
|
|
|
|
#define AU_WIRED_WM(TYPE,BYTES) \
|
|
void \
|
|
__CONCAT(au_wired_wm_,BYTES)(void *v, \
|
|
bus_space_handle_t h, bus_size_t o, const TYPE *src, \
|
|
bus_size_t cnt) \
|
|
{ \
|
|
\
|
|
while (cnt-- > 0) { \
|
|
__CONCAT(au_wired_w_,BYTES)(v, h, o, *src++); \
|
|
wbflush(); \
|
|
} \
|
|
}
|
|
AU_WIRED_WM(uint8_t,1)
|
|
AU_WIRED_WM(uint16_t,2)
|
|
AU_WIRED_WM(uint32_t,4)
|
|
AU_WIRED_WM(uint64_t,8)
|
|
|
|
#define AU_WIRED_WMS(TYPE,BYTES) \
|
|
void \
|
|
__CONCAT(au_wired_wms_,BYTES)(void *v, \
|
|
bus_space_handle_t h, bus_size_t o, const TYPE *src, \
|
|
bus_size_t cnt) \
|
|
{ \
|
|
\
|
|
while (cnt-- > 0) { \
|
|
__CONCAT(au_wired_ws_,BYTES)(v, h, o, *src++); \
|
|
wbflush(); \
|
|
} \
|
|
}
|
|
AU_WIRED_WMS(uint16_t,2)
|
|
AU_WIRED_WMS(uint32_t,4)
|
|
AU_WIRED_WMS(uint64_t,8)
|
|
|
|
#define AU_WIRED_WR(TYPE,BYTES) \
|
|
void \
|
|
__CONCAT(au_wired_wr_,BYTES)(void *v, \
|
|
bus_space_handle_t h, bus_size_t o, const TYPE *src, \
|
|
bus_size_t cnt) \
|
|
{ \
|
|
\
|
|
while (cnt-- > 0) { \
|
|
__CONCAT(au_wired_w_,BYTES)(v, h, o, *src++); \
|
|
o += BYTES; \
|
|
} \
|
|
}
|
|
AU_WIRED_WR(uint8_t,1)
|
|
AU_WIRED_WR(uint16_t,2)
|
|
AU_WIRED_WR(uint32_t,4)
|
|
AU_WIRED_WR(uint64_t,8)
|
|
|
|
#define AU_WIRED_WRS(TYPE,BYTES) \
|
|
void \
|
|
__CONCAT(au_wired_wrs_,BYTES)(void *v, \
|
|
bus_space_handle_t h, bus_size_t o, const TYPE *src, \
|
|
bus_size_t cnt) \
|
|
{ \
|
|
\
|
|
while (cnt-- > 0) { \
|
|
__CONCAT(au_wired_ws_,BYTES)(v, h, o, *src++); \
|
|
o += BYTES; \
|
|
} \
|
|
}
|
|
AU_WIRED_WRS(uint16_t,2)
|
|
AU_WIRED_WRS(uint32_t,4)
|
|
AU_WIRED_WRS(uint64_t,8)
|
|
|
|
#define AU_WIRED_SM(TYPE,BYTES) \
|
|
void \
|
|
__CONCAT(au_wired_sm_,BYTES)(void *v, \
|
|
bus_space_handle_t h, bus_size_t o, TYPE val, \
|
|
bus_size_t cnt) \
|
|
{ \
|
|
\
|
|
while (cnt-- > 0) { \
|
|
__CONCAT(au_wired_w_,BYTES)(v, h, o, val); \
|
|
wbflush(); \
|
|
} \
|
|
}
|
|
AU_WIRED_SM(uint8_t,1)
|
|
AU_WIRED_SM(uint16_t,2)
|
|
AU_WIRED_SM(uint32_t,4)
|
|
AU_WIRED_SM(uint64_t,8)
|
|
|
|
#define AU_WIRED_SR(TYPE,BYTES) \
|
|
void \
|
|
__CONCAT(au_wired_sr_,BYTES)(void *v, \
|
|
bus_space_handle_t h, bus_size_t o, TYPE val, \
|
|
bus_size_t cnt) \
|
|
{ \
|
|
\
|
|
while (cnt-- > 0) { \
|
|
__CONCAT(au_wired_w_,BYTES)(v, h, o, val); \
|
|
o += BYTES; \
|
|
} \
|
|
}
|
|
AU_WIRED_SR(uint8_t,1)
|
|
AU_WIRED_SR(uint16_t,2)
|
|
AU_WIRED_SR(uint32_t,4)
|
|
AU_WIRED_SR(uint64_t,8)
|
|
|
|
|
|
#define AU_WIRED_C(TYPE,BYTES) \
|
|
void \
|
|
__CONCAT(au_wired_c_,BYTES)(void *v, \
|
|
bus_space_handle_t h1, bus_size_t o1, bus_space_handle_t h2, \
|
|
bus_space_handle_t o2, bus_size_t cnt) \
|
|
{ \
|
|
volatile TYPE *src, *dst; \
|
|
src = (volatile TYPE *)(h1 + o1); \
|
|
dst = (volatile TYPE *)(h2 + o2); \
|
|
\
|
|
if (src >= dst) { \
|
|
while (cnt-- > 0) \
|
|
*dst++ = *src++; \
|
|
} else { \
|
|
src += cnt - 1; \
|
|
dst += cnt - 1; \
|
|
while (cnt-- > 0) \
|
|
*dst-- = *src--; \
|
|
} \
|
|
}
|
|
AU_WIRED_C(uint8_t,1)
|
|
AU_WIRED_C(uint16_t,2)
|
|
AU_WIRED_C(uint32_t,4)
|
|
AU_WIRED_C(uint64_t,8)
|
|
|
|
|
|
void
|
|
au_wired_space_init(bus_space_tag_t bst, const char *name,
|
|
paddr_t paddr, bus_addr_t start, bus_size_t size, int flags)
|
|
{
|
|
au_wired_cookie_t *c;
|
|
|
|
c = malloc(sizeof (struct au_wired_cookie), M_DEVBUF,
|
|
M_NOWAIT | M_ZERO);
|
|
|
|
c->c_pbase = paddr;
|
|
c->c_name = name;
|
|
c->c_start = start;
|
|
c->c_size = size;
|
|
|
|
/* allocate extent manager */
|
|
c->c_extent = extent_create(name, start, start + size, M_DEVBUF,
|
|
(void *)c->c_exstore, sizeof (c->c_exstore), EX_NOWAIT);
|
|
if (c->c_extent == NULL)
|
|
panic("au_wired_space_init: %s: cannot create extent", name);
|
|
|
|
#if _BYTE_ORDER == _BIG_ENDIAN
|
|
if (flags & AU_WIRED_SPACE_LITTLE_ENDIAN) {
|
|
if (flags & AU_WIRED_SPACE_SWAP_HW)
|
|
c->c_hwswap = 1;
|
|
else
|
|
c->c_swswap = 1;
|
|
}
|
|
|
|
#elif _BYTE_ORDER == _LITTLE_ENDIAN
|
|
if (flags & AU_WIRED_SPACE_BIG_ENDIAN) {
|
|
if (flags & AU_WIRED_SPACE_SWAP_HW)
|
|
c->c_hwswap = 1;
|
|
else
|
|
c->c_swswap = 1;
|
|
}
|
|
#endif
|
|
|
|
bst->bs_cookie = c;
|
|
bst->bs_map = au_wired_map;
|
|
bst->bs_unmap = au_wired_unmap;
|
|
bst->bs_subregion = au_wired_subregion;
|
|
bst->bs_translate = NULL; /* we don't use these */
|
|
bst->bs_get_window = NULL; /* we don't use these */
|
|
bst->bs_alloc = au_wired_alloc;
|
|
bst->bs_free = au_wired_free;
|
|
bst->bs_vaddr = au_wired_vaddr;
|
|
bst->bs_mmap = au_wired_mmap;
|
|
bst->bs_barrier = au_wired_barrier;
|
|
bst->bs_r_1 = au_wired_r_1;
|
|
bst->bs_w_1 = au_wired_w_1;
|
|
bst->bs_r_2 = au_wired_r_2;
|
|
bst->bs_r_4 = au_wired_r_4;
|
|
bst->bs_r_8 = au_wired_r_8;
|
|
bst->bs_w_2 = au_wired_w_2;
|
|
bst->bs_w_4 = au_wired_w_4;
|
|
bst->bs_w_8 = au_wired_w_8;
|
|
bst->bs_rm_1 = au_wired_rm_1;
|
|
bst->bs_rm_2 = au_wired_rm_2;
|
|
bst->bs_rm_4 = au_wired_rm_4;
|
|
bst->bs_rm_8 = au_wired_rm_8;
|
|
bst->bs_rr_1 = au_wired_rr_1;
|
|
bst->bs_rr_2 = au_wired_rr_2;
|
|
bst->bs_rr_4 = au_wired_rr_4;
|
|
bst->bs_rr_8 = au_wired_rr_8;
|
|
bst->bs_wm_1 = au_wired_wm_1;
|
|
bst->bs_wm_2 = au_wired_wm_2;
|
|
bst->bs_wm_4 = au_wired_wm_4;
|
|
bst->bs_wm_8 = au_wired_wm_8;
|
|
bst->bs_wr_1 = au_wired_wr_1;
|
|
bst->bs_wr_2 = au_wired_wr_2;
|
|
bst->bs_wr_4 = au_wired_wr_4;
|
|
bst->bs_wr_8 = au_wired_wr_8;
|
|
bst->bs_sm_1 = au_wired_sm_1;
|
|
bst->bs_sm_2 = au_wired_sm_2;
|
|
bst->bs_sm_4 = au_wired_sm_4;
|
|
bst->bs_sm_8 = au_wired_sm_8;
|
|
bst->bs_sr_1 = au_wired_sr_1;
|
|
bst->bs_sr_2 = au_wired_sr_2;
|
|
bst->bs_sr_4 = au_wired_sr_4;
|
|
bst->bs_sr_8 = au_wired_sr_8;
|
|
bst->bs_c_1 = au_wired_c_1;
|
|
bst->bs_c_2 = au_wired_c_2;
|
|
bst->bs_c_4 = au_wired_c_4;
|
|
bst->bs_c_8 = au_wired_c_8;
|
|
|
|
bst->bs_rs_1 = au_wired_r_1;
|
|
bst->bs_rs_2 = au_wired_rs_2;
|
|
bst->bs_rs_4 = au_wired_rs_4;
|
|
bst->bs_rs_8 = au_wired_rs_8;
|
|
bst->bs_rms_1 = au_wired_rm_1;
|
|
bst->bs_rms_2 = au_wired_rms_2;
|
|
bst->bs_rms_4 = au_wired_rms_4;
|
|
bst->bs_rms_8 = au_wired_rms_8;
|
|
bst->bs_rrs_1 = au_wired_rr_1;
|
|
bst->bs_rrs_2 = au_wired_rrs_2;
|
|
bst->bs_rrs_4 = au_wired_rrs_4;
|
|
bst->bs_rrs_8 = au_wired_rrs_8;
|
|
bst->bs_ws_1 = au_wired_w_1;
|
|
bst->bs_ws_2 = au_wired_ws_2;
|
|
bst->bs_ws_4 = au_wired_ws_4;
|
|
bst->bs_ws_8 = au_wired_ws_8;
|
|
bst->bs_wms_1 = au_wired_wm_1;
|
|
bst->bs_wms_2 = au_wired_wms_2;
|
|
bst->bs_wms_4 = au_wired_wms_4;
|
|
bst->bs_wms_8 = au_wired_wms_8;
|
|
bst->bs_wrs_1 = au_wired_wr_1;
|
|
bst->bs_wrs_2 = au_wired_wrs_2;
|
|
bst->bs_wrs_4 = au_wired_wrs_4;
|
|
bst->bs_wrs_8 = au_wired_wrs_8;
|
|
}
|