289 lines
6.9 KiB
C
289 lines
6.9 KiB
C
/* $NetBSD: becc_timer.c,v 1.11 2007/01/06 16:18:18 christos Exp $ */
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/*
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* Copyright (c) 2001, 2002 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Jason R. Thorpe for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Timer/clock support for the ADI Engineering Big Endian Companion Chip.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: becc_timer.c,v 1.11 2007/01/06 16:18:18 christos Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/time.h>
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#include <dev/clock_subr.h>
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#include <machine/bus.h>
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#include <arm/cpufunc.h>
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#include <arm/xscale/beccreg.h>
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#include <arm/xscale/beccvar.h>
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void (*becc_hardclock_hook)(void);
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/*
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* Note, since COUNTS_PER_USEC doesn't divide evenly, we round up.
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*/
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#define COUNTS_PER_SEC BECC_PERIPH_CLOCK
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#define COUNTS_PER_USEC ((COUNTS_PER_SEC / 1000000) + 1)
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static void *clock_ih;
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/*
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* Since the timer interrupts when the counter underflows, we need to
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* subtract 1 from counts_per_hz when loading the preload register.
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*/
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static uint32_t counts_per_hz;
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int clockhandler(void *);
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/*
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* becc_calibrate_delay:
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*
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* Calibrate the delay loop.
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*/
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void
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becc_calibrate_delay(void)
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{
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/*
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* Just use hz=100 for now -- we'll adjust it, if necessary,
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* in cpu_initclocks().
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*/
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counts_per_hz = COUNTS_PER_SEC / 100;
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/* Stop both timers, clear interrupts. */
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BECC_CSR_WRITE(BECC_TSCRA, TSCRx_TIF);
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BECC_CSR_WRITE(BECC_TSCRB, TSCRx_TIF);
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/* Set the timer preload value. */
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BECC_CSR_WRITE(BECC_TPRA, counts_per_hz - 1);
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/* Start the timer. */
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BECC_CSR_WRITE(BECC_TSCRA, TSCRx_TE | TSCRx_CM);
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}
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/*
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* cpu_initclocks:
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*
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* Initialize the clock and get them going.
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*/
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void
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cpu_initclocks(void)
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{
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u_int oldirqstate;
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#if 0
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if (hz < 50 || COUNTS_PER_SEC % hz) {
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printf("Cannot get %d Hz clock; using 100 Hz\n", hz);
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hz = 100;
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}
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#endif
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tick = 1000000 / hz; /* number of microseconds between interrupts */
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tickfix = 1000000 - (hz * tick);
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if (tickfix) {
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int ftp;
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ftp = min(ffs(tickfix), ffs(hz));
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tickfix >>= (ftp - 1);
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tickfixinterval = hz >> (ftp - 1);
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}
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/*
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* We only have one timer available; stathz and profhz are
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* always left as 0 (the upper-layer clock code deals with
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* this situation).
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*/
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if (stathz != 0)
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printf("Cannot get %d Hz statclock\n", stathz);
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stathz = 0;
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if (profhz != 0)
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printf("Cannot get %d Hz profclock\n", profhz);
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profhz = 0;
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/* Report the clock frequency. */
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aprint_normal("clock: hz=%d stathz=%d profhz=%d\n", hz, stathz, profhz);
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oldirqstate = disable_interrupts(I32_bit);
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/* Hook up the clock interrupt handler. */
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clock_ih = becc_intr_establish(ICU_TIMERA, IPL_CLOCK,
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clockhandler, NULL);
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if (clock_ih == NULL)
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panic("cpu_initclocks: unable to register timer interrupt");
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/* Set up the new clock parameters. */
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/* Stop timer, clear interrupt */
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BECC_CSR_WRITE(BECC_TSCRA, TSCRx_TIF);
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counts_per_hz = COUNTS_PER_SEC / hz;
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/* Set the timer preload value. */
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BECC_CSR_WRITE(BECC_TPRA, counts_per_hz - 1);
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/* ...and start it in motion. */
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BECC_CSR_WRITE(BECC_TSCRA, TSCRx_TE | TSCRx_CM);
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/* register soft interrupt handler as well */
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becc_intr_establish(ICU_SOFT, IPL_SOFT, becc_softint, NULL);
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restore_interrupts(oldirqstate);
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}
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/*
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* setstatclockrate:
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*
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* Set the rate of the statistics clock.
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*
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* We assume that hz is either stathz or profhz, and that neither
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* will change after being set by cpu_initclocks(). We could
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* recalculate the intervals here, but that would be a pain.
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*/
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void
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setstatclockrate(int new_hz)
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{
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/*
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* XXX Use TMR1?
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*/
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}
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/*
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* microtime:
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*
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* Fill in the specified timeval struct with the current time
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* accurate to the microsecond.
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*/
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void
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microtime(struct timeval *tvp)
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{
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static struct timeval lasttv;
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u_int oldirqstate;
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uint32_t counts;
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oldirqstate = disable_interrupts(I32_bit);
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/*
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* XXX How do we compensate for the -1 behavior of the preload value?
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*/
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counts = counts_per_hz - BECC_CSR_READ(BECC_TCVRA);
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/* Fill in the timeval struct. */
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*tvp = time;
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tvp->tv_usec += (counts / COUNTS_PER_USEC);
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/* Make sure microseconds doesn't overflow. */
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while (tvp->tv_usec >= 1000000) {
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tvp->tv_usec -= 1000000;
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tvp->tv_sec++;
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}
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/* Make sure the time has advanced. */
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if (tvp->tv_sec == lasttv.tv_sec &&
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tvp->tv_usec <= lasttv.tv_usec) {
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tvp->tv_usec = lasttv.tv_usec + 1;
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if (tvp->tv_usec >= 1000000) {
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tvp->tv_usec -= 1000000;
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tvp->tv_sec++;
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}
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}
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lasttv = *tvp;
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restore_interrupts(oldirqstate);
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}
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/*
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* delay:
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*
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* Delay for at least N microseconds.
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*/
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void
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delay(u_int n)
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{
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uint32_t cur, last, delta, usecs;
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/*
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* This works by polling the timer and counting the
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* number of microseconds that go by.
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*/
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last = BECC_CSR_READ(BECC_TCVRA);
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delta = usecs = 0;
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while (n > usecs) {
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cur = BECC_CSR_READ(BECC_TCVRA);
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/* Check to see if the timer has wrapped around. */
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if (last < cur)
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delta += (last + (counts_per_hz - cur));
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else
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delta += (last - cur);
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last = cur;
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if (delta >= COUNTS_PER_USEC) {
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usecs += delta / COUNTS_PER_USEC;
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delta %= COUNTS_PER_USEC;
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}
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}
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}
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/*
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* clockhandler:
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*
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* Handle the hardclock interrupt.
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*/
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int
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clockhandler(void *arg)
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{
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struct clockframe *frame = arg;
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/* ACK the interrupt. */
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BECC_CSR_WRITE(BECC_TSCRA, TSCRx_TE | TSCRx_CM | TSCRx_TIF);
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hardclock(frame);
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if (becc_hardclock_hook != NULL)
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(*becc_hardclock_hook)();
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return (1);
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}
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