690 lines
19 KiB
C
690 lines
19 KiB
C
/* $NetBSD: eppcic.c,v 1.2 2007/07/09 20:52:05 ad Exp $ */
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/*
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* Copyright (c) 2005 HAMAJIMA Katsuomi. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: eppcic.c,v 1.2 2007/07/09 20:52:05 ad Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/device.h>
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#include <sys/kthread.h>
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#include <uvm/uvm_param.h>
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#include <machine/bus.h>
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#include <dev/pcmcia/pcmciareg.h>
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#include <dev/pcmcia/pcmciavar.h>
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#include <dev/pcmcia/pcmciachip.h>
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#include <arm/ep93xx/epsocvar.h>
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#include <arm/ep93xx/epgpiovar.h>
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#include <arm/ep93xx/eppcicvar.h>
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#include <arm/ep93xx/ep93xxreg.h>
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#include <arm/ep93xx/epsmcreg.h>
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#include "epled.h"
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#if NEPLED > 0
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#include <arm/ep93xx/epledvar.h>
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#endif
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#include "epgpio.h"
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#if NEPGPIO == 0
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#error "epgpio requires in eppcic"
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#endif
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#ifdef EPPCIC_DEBUG
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int eppcic_debug = EPPCIC_DEBUG;
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#define DPRINTFN(n,x) if (eppcic_debug>(n)) printf x;
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#else
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#define DPRINTFN(n,x)
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#endif
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/* Mem & I/O */
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#define SOCKET0_MCCD1 1 /* pin36/pin26 (negative) Card Detect 1 */
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#define SOCKET0_MCCD2 2 /* pin67/pin25 (negative) Card Detect 2 */
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#define SOCKET0_VS1 5 /* pin33/pin43 (negative) Voltage Sense 1 */
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#define SOCKET0_VS2 7 /* pin57/pin40 (negative) Voltage Sense 2 */
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/* Memory */
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#define SOCKET0_WP 0 /* pin33/pin24 Write Protect */
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#define SOCKET0_MCBVD1 3 /* pin63/pin46 Battery Voltage Detect 1 */
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#define SOCKET0_MCBVD2 4 /* pin62/pin45 Battery Voltage Detect 2 */
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#define SOCKET0_READY 6 /* pin16/pin37 Ready */
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/* I/O */
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#define SOCKET0_STSCHG 3 /* pin63/pin46 (negative) Status Change */
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#define SOCKET0_SPKR 4 /* pin62/pin45 (negative) Speaker */
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#define SOCKET0_IREQ 6 /* pin16/pin37 Interrupt Request */
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struct eppcic_handle {
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int ph_socket; /* socket number */
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struct eppcic_softc *ph_sc;
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struct device *ph_card;
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int (*ph_ih_func)(void *);
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void *ph_ih_arg;
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lwp_t *ph_event_thread;
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int ph_run; /* ktread running */
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int ph_width; /* 8 or 16 */
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int ph_vcc; /* 3 or 5 */
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int ph_status[2]; /* cd1 and cd2 */
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int ph_port; /* GPIO port */
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int ph_cd[2]; /* card detect */
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int ph_vs[2]; /* voltage sense */
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int ph_ireq; /* interrupt request */
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struct {
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bus_size_t reg;
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bus_addr_t base;
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bus_size_t size;
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} ph_space[3];
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#define IO 0
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#define COMMON 1
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#define ATTRIBUTE 2
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};
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static int eppcic_intr_carddetect(void *);
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static int eppcic_intr_socket(void *);
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static int eppcic_print(void *, const char *);
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static void eppcic_event_thread(void *);
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void eppcic_shutdown(void *);
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static int eppcic_mem_alloc(pcmcia_chipset_handle_t, bus_size_t,
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struct pcmcia_mem_handle *);
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static void eppcic_mem_free(pcmcia_chipset_handle_t,
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struct pcmcia_mem_handle *);
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static int eppcic_mem_map(pcmcia_chipset_handle_t, int, bus_addr_t, bus_size_t,
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struct pcmcia_mem_handle *, bus_size_t *, int *);
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static void eppcic_mem_unmap(pcmcia_chipset_handle_t, int);
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static int eppcic_io_alloc(pcmcia_chipset_handle_t, bus_addr_t, bus_size_t,
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bus_size_t, struct pcmcia_io_handle *);
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static void eppcic_io_free(pcmcia_chipset_handle_t, struct pcmcia_io_handle *);
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static int eppcic_io_map(pcmcia_chipset_handle_t, int, bus_addr_t, bus_size_t,
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struct pcmcia_io_handle *, int *);
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static void eppcic_io_unmap(pcmcia_chipset_handle_t, int);
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static void *eppcic_intr_establish(pcmcia_chipset_handle_t,
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struct pcmcia_function *,
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int, int (*)(void *), void *);
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static void eppcic_intr_disestablish(pcmcia_chipset_handle_t, void *);
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static void eppcic_socket_enable(pcmcia_chipset_handle_t);
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static void eppcic_socket_disable(pcmcia_chipset_handle_t);
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static void eppcic_socket_settype(pcmcia_chipset_handle_t, int);
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static void eppcic_attach_socket(struct eppcic_handle *);
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static void eppcic_config_socket(struct eppcic_handle *);
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static int eppcic_get_voltage(struct eppcic_handle *);
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static void eppcic_set_pcreg(struct eppcic_handle *, int);
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static struct pcmcia_chip_functions eppcic_functions = {
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eppcic_mem_alloc, eppcic_mem_free,
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eppcic_mem_map, eppcic_mem_unmap,
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eppcic_io_alloc, eppcic_io_free,
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eppcic_io_map, eppcic_io_unmap,
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eppcic_intr_establish, eppcic_intr_disestablish,
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eppcic_socket_enable, eppcic_socket_disable,
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eppcic_socket_settype
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};
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void
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eppcic_attach_common(struct device *parent, struct device *self, void *aux,
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eppcic_chipset_tag_t pcic)
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{
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struct eppcic_softc *sc = (struct eppcic_softc *)self;
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struct epsoc_attach_args *sa = aux;
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struct eppcic_handle *ph;
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int reg;
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int i;
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if (!sa->sa_gpio) {
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printf("%s: epgpio requires\n", self->dv_xname);
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return;
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}
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sc->sc_gpio = sa->sa_gpio;
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sc->sc_iot = sa->sa_iot;
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sc->sc_hclk = sa->sa_hclk;
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sc->sc_pcic = pcic;
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sc->sc_enable = 0;
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if (bus_space_map(sa->sa_iot, sa->sa_addr,
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sa->sa_size, 0, &sc->sc_ioh)){
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printf("%s: Cannot map registers\n", self->dv_xname);
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return;
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}
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printf("\n");
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#if NEPLED > 0
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epled_green_on();
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epled_red_off();
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#endif
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/* socket 0 */
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if (!(ph = malloc(sizeof(struct eppcic_handle), M_DEVBUF, M_NOWAIT))) {
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printf("%s: Cannot allocate memory\n", self->dv_xname);
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return; /* ENOMEM */
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}
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sc->sc_ph[0] = ph;
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ph->ph_sc = sc;
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ph->ph_socket = 0;
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ph->ph_port = PORT_F;
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ph->ph_cd[0] = SOCKET0_MCCD1;
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ph->ph_cd[1] = SOCKET0_MCCD2;
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ph->ph_vs[0] = SOCKET0_VS1;
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ph->ph_vs[1] = SOCKET0_VS2;
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ph->ph_ireq = SOCKET0_IREQ;
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ph->ph_space[IO].reg = EP93XX_PCMCIA0_IO;
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ph->ph_space[IO].base = EP93XX_PCMCIA0_HWBASE + EP93XX_PCMCIA_IO;
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ph->ph_space[IO].size = EP93XX_PCMCIA_IO_SIZE;
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ph->ph_space[COMMON].reg = EP93XX_PCMCIA0_Common;
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ph->ph_space[COMMON].base = EP93XX_PCMCIA0_HWBASE
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+ EP93XX_PCMCIA_COMMON;
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ph->ph_space[COMMON].size = EP93XX_PCMCIA_COMMON_SIZE;
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ph->ph_space[ATTRIBUTE].reg = EP93XX_PCMCIA0_Attribute;
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ph->ph_space[ATTRIBUTE].base = EP93XX_PCMCIA0_HWBASE
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+ EP93XX_PCMCIA_ATTRIBUTE;
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ph->ph_space[ATTRIBUTE].size = EP93XX_PCMCIA_ATTRIBUTE_SIZE;
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eppcic_attach_socket(ph);
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reg = EP93XX_PCMCIA_WEN | (pcic->socket_type)(sc, 0);
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, EP93XX_PCMCIA_Ctrl,
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EP93XX_PCMCIA_RST | reg);
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delay(10);
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, EP93XX_PCMCIA_Ctrl, reg);
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delay(500);
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for (i = 0; i < EP93XX_PCMCIA_NSOCKET; i++)
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eppcic_config_socket(sc->sc_ph[i]);
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#if NEPLED > 0
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epled_green_off();
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#endif
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}
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static void
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eppcic_attach_socket(struct eppcic_handle *ph)
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{
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struct eppcic_softc *sc = ph->ph_sc;
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eppcic_chipset_tag_t pcic = sc->sc_pcic;
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int wait;
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ph->ph_width = 16;
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ph->ph_vcc = 3;
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ph->ph_event_thread = NULL;
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ph->ph_run = 0;
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ph->ph_ih_func = NULL;
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ph->ph_ih_arg = NULL;
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epgpio_in(sc->sc_gpio, ph->ph_port, ph->ph_cd[0]);
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epgpio_in(sc->sc_gpio, ph->ph_port, ph->ph_cd[1]);
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epgpio_in(sc->sc_gpio, ph->ph_port, ph->ph_vs[0]);
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epgpio_in(sc->sc_gpio, ph->ph_port, ph->ph_vs[1]);
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ph->ph_status[0] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[0]);
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ph->ph_status[1] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[1]);
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wait = (pcic->power_ctl)(sc, ph->ph_socket, POWER_OFF);
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delay(wait);
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eppcic_set_pcreg(ph, ph->ph_space[IO].reg);
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eppcic_set_pcreg(ph, ph->ph_space[COMMON].reg);
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eppcic_set_pcreg(ph, ph->ph_space[ATTRIBUTE].reg);
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wait = (pcic->power_ctl)(sc, ph->ph_socket, POWER_ON);
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delay(wait);
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}
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static void
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eppcic_config_socket(struct eppcic_handle *ph)
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{
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struct eppcic_softc *sc = ph->ph_sc;
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eppcic_chipset_tag_t pcic = sc->sc_pcic;
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struct pcmciabus_attach_args paa;
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int wait;
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paa.paa_busname = "pcmcia";
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paa.pct = (pcmcia_chipset_tag_t)&eppcic_functions;
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paa.pch = (pcmcia_chipset_handle_t)ph;
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paa.iobase = ph->ph_space[IO].base;
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paa.iosize = ph->ph_space[IO].size;
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ph->ph_card = config_found_ia((void*)sc, "pcmciabus", &paa,
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eppcic_print);
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epgpio_intr_establish(sc->sc_gpio, ph->ph_port, ph->ph_cd[0],
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EDGE_TRIGGER | FALLING_EDGE | DEBOUNCE,
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IPL_TTY, eppcic_intr_carddetect, ph);
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epgpio_intr_establish(sc->sc_gpio, ph->ph_port, ph->ph_cd[1],
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EDGE_TRIGGER | RISING_EDGE | DEBOUNCE,
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IPL_TTY, eppcic_intr_carddetect, ph);
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wait = (pcic->power_ctl)(sc, ph->ph_socket, POWER_OFF);
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delay(wait);
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ph->ph_status[0] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[0]);
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ph->ph_status[1] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[1]);
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DPRINTFN(1, ("eppcic_config_socket: cd1=%d, cd2=%d\n",ph->ph_status[0],ph->ph_status[1]));
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if (!(ph->ph_status[0] | ph->ph_status[1]))
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pcmcia_card_attach(ph->ph_card);
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ph->ph_run = 1;
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kthread_create(PRI_NONE, 0, NULL, eppcic_event_thread, ph,
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&ph->ph_event_thread, "%s,%d", sc->sc_dev.dv_xname,
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ph->ph_socket);
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}
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static int
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eppcic_print(void *arg, const char *pnp)
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{
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return (UNCONF);
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}
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static void
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eppcic_event_thread(void *arg)
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{
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struct eppcic_handle *ph = arg;
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for (;;) {
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tsleep(ph, PWAIT, "CSC wait", 0);
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if (!ph->ph_run)
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break;
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DPRINTFN(1, ("eppcic_event_thread: cd1=%d, cd2=%d\n",ph->ph_status[0],ph->ph_status[1]));
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if (!ph->ph_status[0] && !ph->ph_status[1])
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pcmcia_card_attach(ph->ph_card);
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else if (ph->ph_status[0] && ph->ph_status[1])
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pcmcia_card_detach(ph->ph_card, DETACH_FORCE);
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}
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DPRINTFN(1, ("eppcic_event_thread: run=%d\n",ph->ph_run));
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ph->ph_event_thread = NULL;
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kthread_exit(0);
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}
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void
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eppcic_shutdown(void *arg)
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{
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struct eppcic_handle *ph = arg;
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DPRINTFN(1, ("eppcic_shutdown\n"));
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ph->ph_run = 0;
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wakeup(ph);
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}
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static int
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eppcic_intr_carddetect(void *arg)
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{
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struct eppcic_handle *ph = arg;
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struct eppcic_softc *sc = ph->ph_sc;
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int nstatus[2];
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nstatus[0] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[0]);
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nstatus[1] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[1]);
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DPRINTFN(1, ("eppcic_intr: cd1=%#x, cd2=%#x\n",nstatus[0],nstatus[1]));
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if (nstatus[0] != ph->ph_status[0] || nstatus[1] != ph->ph_status[1])
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wakeup(ph);
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ph->ph_status[0] = nstatus[0];
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ph->ph_status[1] = nstatus[1];
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return 0;
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}
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static int
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eppcic_mem_alloc(pcmcia_chipset_handle_t pch, bus_size_t size,
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struct pcmcia_mem_handle *pmh)
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{
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struct eppcic_handle *ph = (struct eppcic_handle *)pch;
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struct eppcic_softc *sc = ph->ph_sc;
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DPRINTFN(1, ("eppcic_mem_alloc: size=%#x\n",(unsigned)size));
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pmh->memt = sc->sc_iot;
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return 0;
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}
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static void
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eppcic_mem_free(pcmcia_chipset_handle_t pch, struct pcmcia_mem_handle *pmh)
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{
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DPRINTFN(1, ("eppcic_mem_free\n"));
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}
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static int
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eppcic_mem_map(pcmcia_chipset_handle_t pch, int kind, bus_addr_t addr,
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bus_size_t size, struct pcmcia_mem_handle *pmh,
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bus_size_t *offsetp, int *windowp)
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{
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struct eppcic_handle *ph = (struct eppcic_handle *)pch;
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struct eppcic_softc *sc = ph->ph_sc;
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bus_addr_t pa;
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int err;
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DPRINTFN(1, ("eppcic_mem_map: kind=%d, addr=%#x, size=%#x\n",kind,(unsigned)addr,(unsigned)size));
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pa = addr;
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*offsetp = 0;
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size = round_page(size);
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pmh->realsize = size;
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if (kind & PCMCIA_WIDTH_MEM8)
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ph->ph_width = 8;
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else
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ph->ph_width = 16;
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switch (kind & ~PCMCIA_WIDTH_MEM_MASK) {
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case PCMCIA_MEM_ATTR:
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eppcic_set_pcreg(ph, ph->ph_space[ATTRIBUTE].reg);
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pa += ph->ph_space[ATTRIBUTE].base;
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break;
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case PCMCIA_MEM_COMMON:
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eppcic_set_pcreg(ph, ph->ph_space[COMMON].reg);
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pa += ph->ph_space[COMMON].base;
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break;
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default:
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return -1;
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}
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DPRINTFN(1, ("eppcic_mem_map: pa=%#x, *offsetp=%#x, size=%#x\n",(unsigned)pa,(unsigned)addr,(unsigned)size));
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if (!(err = bus_space_map(sc->sc_iot, pa, size, 0, &pmh->memh)))
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*windowp = (int)pmh->memh;
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return err;
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}
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static void
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eppcic_mem_unmap(pcmcia_chipset_handle_t pch, int window)
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{
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struct eppcic_handle *ph = (struct eppcic_handle *)pch;
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struct eppcic_softc *sc = ph->ph_sc;
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DPRINTFN(1, ("eppcic_mem_unmap: window=%#x\n",window));
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bus_space_unmap(sc->sc_iot, (bus_addr_t)window, 0x400);
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}
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static int
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eppcic_io_alloc(pcmcia_chipset_handle_t pch, bus_addr_t start, bus_size_t size,
|
|
bus_size_t align, struct pcmcia_io_handle *pih)
|
|
{
|
|
struct eppcic_handle *ph = (struct eppcic_handle *)pch;
|
|
struct eppcic_softc *sc = ph->ph_sc;
|
|
bus_addr_t pa;
|
|
|
|
DPRINTFN(1, ("eppcic_io_alloc: start=%#x, size=%#x, align=%#x\n",(unsigned)start,(unsigned)size,(unsigned)align));
|
|
|
|
pih->iot = sc->sc_iot;
|
|
pih->addr = start;
|
|
pih->size = size;
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|
pa = pih->addr + ph->ph_space[IO].base;
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|
return bus_space_map(sc->sc_iot, pa, size, 0, &pih->ioh);
|
|
}
|
|
|
|
static void
|
|
eppcic_io_free(pcmcia_chipset_handle_t pch, struct pcmcia_io_handle *pih)
|
|
{
|
|
struct eppcic_handle *ph = (struct eppcic_handle *)pch;
|
|
struct eppcic_softc *sc = ph->ph_sc;
|
|
|
|
DPRINTFN(1, ("eppcic_io_free\n"));
|
|
|
|
bus_space_unmap(sc->sc_iot, pih->ioh, pih->size);
|
|
}
|
|
|
|
static int
|
|
eppcic_io_map(pcmcia_chipset_handle_t pch, int width, bus_addr_t offset,
|
|
bus_size_t size, struct pcmcia_io_handle *pih, int *windowp)
|
|
{
|
|
struct eppcic_handle *ph = (struct eppcic_handle *)pch;
|
|
|
|
DPRINTFN(1, ("eppcic_io_map: offset=%#x, size=%#x, width=%d",(unsigned)offset,(unsigned)size,width));
|
|
|
|
switch (width) {
|
|
case PCMCIA_WIDTH_IO8:
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|
DPRINTFN(1, ("(8bit)\n"));
|
|
ph->ph_width = 8;
|
|
break;
|
|
case PCMCIA_WIDTH_IO16:
|
|
case PCMCIA_WIDTH_AUTO: /* I don't understand how I check it */
|
|
DPRINTFN(1, ("(16bit)\n"));
|
|
ph->ph_width = 16;
|
|
break;
|
|
default:
|
|
DPRINTFN(1, ("(unknown)\n"));
|
|
return -1;
|
|
}
|
|
eppcic_set_pcreg(ph, ph->ph_space[IO].reg);
|
|
*windowp = 0; /* unused */
|
|
return 0;
|
|
}
|
|
|
|
static void
|
|
eppcic_io_unmap(pcmcia_chipset_handle_t pch, int window)
|
|
{
|
|
DPRINTFN(1, ("eppcic_io_unmap: window=%#x\n",window));
|
|
}
|
|
|
|
static void *
|
|
eppcic_intr_establish(pcmcia_chipset_handle_t pch, struct pcmcia_function *pf,
|
|
int ipl, int (*ih_func)(void *), void *ih_arg)
|
|
{
|
|
struct eppcic_handle *ph = (struct eppcic_handle *)pch;
|
|
struct eppcic_softc *sc = ph->ph_sc;
|
|
|
|
DPRINTFN(1, ("eppcic_intr_establish\n"));
|
|
|
|
if (ph->ph_ih_func)
|
|
return 0;
|
|
|
|
ph->ph_ih_func = ih_func;
|
|
ph->ph_ih_arg = ih_arg;
|
|
return epgpio_intr_establish(sc->sc_gpio, ph->ph_port, ph->ph_ireq,
|
|
LEVEL_SENSE | LOW_LEVEL,
|
|
ipl, eppcic_intr_socket, ph);
|
|
}
|
|
|
|
static void
|
|
eppcic_intr_disestablish(pcmcia_chipset_handle_t pch, void *ih)
|
|
{
|
|
struct eppcic_handle *ph = (struct eppcic_handle *)pch;
|
|
struct eppcic_softc *sc = ph->ph_sc;
|
|
|
|
DPRINTFN(1, ("eppcic_intr_disestablish\n"));
|
|
|
|
ph->ph_ih_func = NULL;
|
|
ph->ph_ih_arg = NULL;
|
|
epgpio_intr_disestablish(sc->sc_gpio, ph->ph_port, ph->ph_ireq);
|
|
}
|
|
|
|
static int
|
|
eppcic_intr_socket(void *arg)
|
|
{
|
|
struct eppcic_handle *ph = arg;
|
|
int err = 0;
|
|
|
|
if (ph->ph_ih_func) {
|
|
#if NEPLED > 0
|
|
epled_red_on();
|
|
#endif
|
|
err = (*ph->ph_ih_func)(ph->ph_ih_arg);
|
|
#if NEPLED > 0
|
|
epled_red_off();
|
|
#endif
|
|
}
|
|
return err;
|
|
}
|
|
|
|
|
|
static void
|
|
eppcic_socket_enable(pcmcia_chipset_handle_t pch)
|
|
{
|
|
struct eppcic_handle *ph = (struct eppcic_handle *)pch;
|
|
struct eppcic_softc *sc = ph->ph_sc;
|
|
eppcic_chipset_tag_t pcic = sc->sc_pcic;
|
|
int wait;
|
|
|
|
DPRINTFN(1, ("eppcic_socket_enable\n"));
|
|
|
|
wait = (pcic->power_ctl)(sc, ph->ph_socket, POWER_ON);
|
|
delay(wait);
|
|
#if NEPLED > 0
|
|
if (!sc->sc_enable++)
|
|
epled_green_on();
|
|
#endif
|
|
ph->ph_vcc = eppcic_get_voltage(ph);
|
|
}
|
|
|
|
static void
|
|
eppcic_socket_disable(pcmcia_chipset_handle_t pch)
|
|
{
|
|
struct eppcic_handle *ph = (struct eppcic_handle *)pch;
|
|
struct eppcic_softc *sc = ph->ph_sc;
|
|
eppcic_chipset_tag_t pcic = sc->sc_pcic;
|
|
int wait;
|
|
|
|
DPRINTFN(1, ("eppcic_socket_disable\n"));
|
|
|
|
wait = (pcic->power_ctl)(sc, ph->ph_socket, POWER_OFF);
|
|
delay(wait);
|
|
#if NEPLED > 0
|
|
if (!--sc->sc_enable)
|
|
epled_green_off();
|
|
#endif
|
|
}
|
|
|
|
static void
|
|
eppcic_socket_settype(pcmcia_chipset_handle_t pch, int type)
|
|
{
|
|
DPRINTFN(1, ("eppcic_socket_settype: type=%d",type));
|
|
|
|
switch (type) {
|
|
case PCMCIA_IFTYPE_MEMORY:
|
|
DPRINTFN(1, ("(Memory)\n"));
|
|
break;
|
|
case PCMCIA_IFTYPE_IO:
|
|
DPRINTFN(1, ("(I/O)\n"));
|
|
break;
|
|
default:
|
|
DPRINTFN(1, ("(unknown)\n"));
|
|
return;
|
|
}
|
|
}
|
|
|
|
static int
|
|
eppcic_get_voltage(struct eppcic_handle *ph)
|
|
{
|
|
struct eppcic_softc *sc = ph->ph_sc;
|
|
eppcic_chipset_tag_t pcic = sc->sc_pcic;
|
|
int cap, vcc = 0;
|
|
|
|
cap = (pcic->power_capability)(sc, ph->ph_socket);
|
|
if (epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_vs[0])) {
|
|
if (cap | VCC_5V)
|
|
vcc = 5;
|
|
else
|
|
printf("%s: unsupported Vcc 5 Volts",
|
|
sc->sc_dev.dv_xname);
|
|
} else {
|
|
if (cap | VCC_3V)
|
|
vcc = 3;
|
|
else
|
|
printf("%s: unsupported Vcc 3.3 Volts",
|
|
sc->sc_dev.dv_xname);
|
|
}
|
|
DPRINTFN(1, ("eppcic_get_voltage: vs1=%d, vs2=%d (%dV)\n",epgpio_read_bit(sc->sc_gpio, ph->ph_port, ph->ph_vs[0]),epgpio_read_bit(sc->sc_gpio, ph->ph_port, ph->ph_vs[1]),vcc));
|
|
return vcc;
|
|
}
|
|
|
|
#define EXTRA_DELAY 40
|
|
|
|
static void
|
|
eppcic_set_pcreg(struct eppcic_handle *ph, int kind)
|
|
{
|
|
struct eppcic_softc *sc = ph->ph_sc;
|
|
int atiming, htiming, ptiming;
|
|
int period = 1000000000 / sc->sc_hclk;
|
|
int width;
|
|
|
|
switch (ph->ph_width) {
|
|
case 8:
|
|
width = 0;
|
|
break;
|
|
case 16:
|
|
width = EP93XX_PCMCIA_WIDTH_16;
|
|
break;
|
|
default:
|
|
return;
|
|
}
|
|
switch (kind) {
|
|
case IO:
|
|
atiming = 165; htiming = 20; ptiming = 70;
|
|
break;
|
|
case COMMON:
|
|
#if linux_timing!=hamajima20050816
|
|
switch (ph->ph_vcc) {
|
|
case 3:
|
|
atiming = 465; htiming = 35; ptiming = 100;
|
|
break;
|
|
case 5:
|
|
atiming = 200; htiming = 20; ptiming = 30;
|
|
break;
|
|
default:
|
|
return;
|
|
}
|
|
break;
|
|
#endif
|
|
case ATTRIBUTE:
|
|
switch (ph->ph_vcc) {
|
|
case 3:
|
|
#if linux_timing!=hamajima20050816
|
|
atiming = 465; htiming = 35; ptiming = 100;
|
|
#else
|
|
atiming = 600; htiming = 35; ptiming = 100;
|
|
#endif
|
|
break;
|
|
case 5:
|
|
#if linux_timing!=hamajima20050816
|
|
atiming = 250; htiming = 20; ptiming = 30;
|
|
#else
|
|
atiming = 300; htiming = 20; ptiming = 30;
|
|
#endif
|
|
break;
|
|
default:
|
|
return;
|
|
}
|
|
break;
|
|
default:
|
|
return;
|
|
}
|
|
|
|
#if linux_timing!=hamajima20050816
|
|
period = 1000000000 / 50000000;
|
|
width = EP93XX_PCMCIA_WIDTH_16;
|
|
#endif
|
|
|
|
atiming = (atiming + EXTRA_DELAY) / period;
|
|
if (atiming>0xff)
|
|
atiming = 0xff;
|
|
htiming = ((htiming + EXTRA_DELAY) / period) + 1;
|
|
if (htiming>0xf)
|
|
htiming = 0xf;
|
|
ptiming = (ptiming + EXTRA_DELAY) / period;
|
|
if (ptiming>0xff)
|
|
ptiming = 0xff;
|
|
|
|
DPRINTFN(1, ("eppcic_set_pcreg: width=%d, access=%d, hold=%d, pre-charge=%d\n",ph->ph_width,atiming,htiming,ptiming));
|
|
|
|
bus_space_write_4(sc->sc_iot, sc->sc_ioh, ph->ph_space[kind].reg,
|
|
width
|
|
| (atiming<<EP93XX_PCMCIA_ACCESS_SHIFT)
|
|
| (htiming<<EP93XX_PCMCIA_HOLD_SHIFT)
|
|
| (ptiming<<EP93XX_PCMCIA_PRECHARGE_SHIFT));
|
|
}
|