3da4b2a160
Change splimp -> splnet in Ethernet, ARCnet, and FDDI drivers.
519 lines
13 KiB
C
519 lines
13 KiB
C
/* $NetBSD: clock.c,v 1.35 1995/12/24 02:30:07 mycroft Exp $ */
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/*-
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* Copyright (c) 1993, 1994 Charles Hannum.
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz and Don Ahn.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)clock.c 7.2 (Berkeley) 5/12/91
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*/
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/*
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* Mach Operating System
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* Copyright (c) 1991,1990,1989 Carnegie Mellon University
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* All Rights Reserved.
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*
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* Permission to use, copy, modify and distribute this software and its
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* documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
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* ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie Mellon
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* the rights to redistribute these changes.
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*/
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/*
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Copyright 1988, 1989 by Intel Corporation, Santa Clara, California.
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All Rights Reserved
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Permission to use, copy, modify, and distribute this software and
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its documentation for any purpose and without fee is hereby
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granted, provided that the above copyright notice appears in all
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copies and that both the copyright notice and this permission notice
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appear in supporting documentation, and that the name of Intel
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not be used in advertising or publicity pertaining to distribution
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of the software without specific, written prior permission.
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INTEL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
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INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS,
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IN NO EVENT SHALL INTEL BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
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CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
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LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
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NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
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WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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/*
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* Primitive clock interrupt routines.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/time.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <machine/cpu.h>
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#include <machine/pio.h>
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#include <machine/cpufunc.h>
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#include <dev/isa/isareg.h>
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#include <dev/isa/isavar.h>
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#include <dev/ic/mc146818reg.h>
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#include <i386/isa/nvram.h>
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#include <i386/isa/timerreg.h>
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#include <i386/isa/spkrreg.h>
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void spinwait __P((int));
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#define SECMIN ((unsigned)60) /* seconds per minute */
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#define SECHOUR ((unsigned)(60*SECMIN)) /* seconds per hour */
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#define SECDAY ((unsigned)(24*SECHOUR)) /* seconds per day */
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#define SECYR ((unsigned)(365*SECDAY)) /* seconds per common year */
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__inline u_int
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mc146818_read(sc, reg)
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void *sc; /* XXX use it? */
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u_int reg;
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{
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outb(IO_RTC, reg);
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return (inb(IO_RTC+1));
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}
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__inline void
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mc146818_write(sc, reg, datum)
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void *sc; /* XXX use it? */
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u_int reg, datum;
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{
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outb(IO_RTC, reg);
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outb(IO_RTC+1, datum);
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}
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void
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startrtclock()
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{
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int s;
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findcpuspeed(); /* use the clock (while it's free)
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to find the cpu speed */
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/* initialize 8253 clock */
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outb(TIMER_MODE, TIMER_SEL0|TIMER_RATEGEN|TIMER_16BIT);
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/* Correct rounding will buy us a better precision in timekeeping */
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outb(IO_TIMER1, TIMER_DIV(hz) % 256);
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outb(IO_TIMER1, TIMER_DIV(hz) / 256);
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/* Check diagnostic status */
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if (s = mc146818_read(NULL, NVRAM_DIAG)) /* XXX softc */
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printf("RTC BIOS diagnostic error %b\n", s, NVRAM_DIAG_BITS);
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}
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int
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clockintr(arg)
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void *arg;
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{
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struct clockframe *frame = arg; /* not strictly necessary */
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hardclock(frame);
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return -1;
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}
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int
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gettick()
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{
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u_char lo, hi;
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/* Don't want someone screwing with the counter while we're here. */
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disable_intr();
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/* Select counter 0 and latch it. */
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outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
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lo = inb(TIMER_CNTR0);
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hi = inb(TIMER_CNTR0);
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enable_intr();
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return ((hi << 8) | lo);
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}
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/*
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* Wait "n" microseconds.
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* Relies on timer 1 counting down from (TIMER_FREQ / hz) at TIMER_FREQ Hz.
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* Note: timer had better have been programmed before this is first used!
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* (Note that we use `rate generator' mode, which counts at 1:1; `square
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* wave' mode counts at 2:1).
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*/
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void
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delay(n)
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int n;
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{
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int limit, tick, otick;
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/*
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* Read the counter first, so that the rest of the setup overhead is
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* counted.
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*/
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otick = gettick();
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#ifdef __GNUC__
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/*
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* Calculate ((n * TIMER_FREQ) / 1e6) using explicit assembler code so
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* we can take advantage of the intermediate 64-bit quantity to prevent
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* loss of significance.
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*/
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n -= 5;
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if (n < 0)
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return;
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{register int m;
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__asm __volatile("mul %3"
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: "=a" (n), "=d" (m)
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: "0" (n), "r" (TIMER_FREQ));
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__asm __volatile("div %3"
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: "=a" (n)
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: "0" (n), "d" (m), "r" (1000000)
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: "%edx");}
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#else
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/*
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* Calculate ((n * TIMER_FREQ) / 1e6) without using floating point and
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* without any avoidable overflows.
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*/
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n -= 20;
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{
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int sec = n / 1000000,
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usec = n % 1000000;
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n = sec * TIMER_FREQ +
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usec * (TIMER_FREQ / 1000000) +
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usec * ((TIMER_FREQ % 1000000) / 1000) / 1000 +
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usec * (TIMER_FREQ % 1000) / 1000000;
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}
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#endif
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limit = TIMER_FREQ / hz;
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while (n > 0) {
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tick = gettick();
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if (tick > otick)
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n -= limit - (tick - otick);
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else
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n -= otick - tick;
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otick = tick;
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}
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}
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static int beeping;
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void
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sysbeepstop(arg)
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void *arg;
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{
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/* disable counter 2 */
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disable_intr();
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outb(PITAUX_PORT, inb(PITAUX_PORT) & ~PIT_SPKR);
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enable_intr();
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beeping = 0;
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}
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void
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sysbeep(pitch, period)
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int pitch, period;
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{
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static int last_pitch;
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if (beeping)
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untimeout(sysbeepstop, 0);
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if (pitch == 0 || period == 0) {
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sysbeepstop(0);
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last_pitch = 0;
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return;
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}
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if (!beeping || last_pitch != pitch) {
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disable_intr();
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outb(TIMER_MODE, TIMER_SEL2 | TIMER_16BIT | TIMER_SQWAVE);
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outb(TIMER_CNTR2, TIMER_DIV(pitch) % 256);
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outb(TIMER_CNTR2, TIMER_DIV(pitch) / 256);
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outb(PITAUX_PORT, inb(PITAUX_PORT) | PIT_SPKR); /* enable counter 2 */
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enable_intr();
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}
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last_pitch = pitch;
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beeping = 1;
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timeout(sysbeepstop, 0, period);
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}
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unsigned int delaycount; /* calibrated loop variable (1 millisecond) */
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#define FIRST_GUESS 0x2000
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findcpuspeed()
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{
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int i;
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int remainder;
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/* Put counter in count down mode */
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outb(TIMER_MODE, TIMER_SEL0 | TIMER_16BIT | TIMER_RATEGEN);
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outb(TIMER_CNTR0, 0xff);
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outb(TIMER_CNTR0, 0xff);
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for (i = FIRST_GUESS; i; i--)
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;
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/* Read the value left in the counter */
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remainder = gettick();
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/*
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* Formula for delaycount is:
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* (loopcount * timer clock speed) / (counter ticks * 1000)
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*/
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delaycount = (FIRST_GUESS * TIMER_DIV(1000)) / (0xffff-remainder);
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}
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void
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cpu_initclocks()
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{
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/*
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* XXX If you're doing strange things with multiple clocks, you might
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* want to keep track of clock handlers.
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*/
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(void)isa_intr_establish(0, IST_PULSE, IPL_CLOCK, clockintr, 0);
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}
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void
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rtcinit()
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{
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static int first_rtcopen_ever = 1;
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if (!first_rtcopen_ever)
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return;
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first_rtcopen_ever = 0;
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mc146818_write(NULL, MC_REGA, /* XXX softc */
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MC_BASE_32_KHz | MC_RATE_1024_Hz);
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mc146818_write(NULL, MC_REGB, MC_REGB_24HR); /* XXX softc */
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}
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int
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rtcget(regs)
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mc_todregs *regs;
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{
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rtcinit();
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if (mc146818_read(NULL, MC_REGD) & MC_REGD_VRT == 0) /* XXX softc */
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return (-1);
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MC146818_GETTOD(NULL, regs); /* XXX softc */
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return (0);
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}
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void
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rtcput(regs)
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mc_todregs *regs;
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{
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rtcinit();
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MC146818_PUTTOD(NULL, regs); /* XXX softc */
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}
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static int month[12] = {31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
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static int
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yeartoday(year)
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int year;
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{
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return ((year % 4) ? 365 : 366);
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}
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int
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hexdectodec(n)
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char n;
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{
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return (((n >> 4) & 0x0f) * 10 + (n & 0x0f));
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}
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char
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dectohexdec(n)
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int n;
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{
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return ((char)(((n / 10) << 4) & 0xf0) | ((n % 10) & 0x0f));
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}
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static int timeset;
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/*
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* Initialize the time of day register, based on the time base which is, e.g.
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* from a filesystem.
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*/
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void
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inittodr(base)
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time_t base;
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{
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mc_todregs rtclk;
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time_t n;
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int sec, min, hr, dom, mon, yr;
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int i, days = 0;
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int s;
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/*
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* We mostly ignore the suggested time and go for the RTC clock time
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* stored in the CMOS RAM. If the time can't be obtained from the
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* CMOS, or if the time obtained from the CMOS is 5 or more years
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* less than the suggested time, we used the suggested time. (In
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* the latter case, it's likely that the CMOS battery has died.)
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*/
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if (base < 15*SECYR) { /* if before 1985, something's odd... */
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printf("WARNING: preposterous time in file system\n");
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/* read the system clock anyway */
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base = 17*SECYR + 186*SECDAY + SECDAY/2;
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}
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s = splclock();
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if (rtcget(&rtclk)) {
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splx(s);
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printf("WARNING: invalid time in clock chip\n");
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goto fstime;
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}
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splx(s);
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sec = hexdectodec(rtclk[MC_SEC]);
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min = hexdectodec(rtclk[MC_MIN]);
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hr = hexdectodec(rtclk[MC_HOUR]);
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dom = hexdectodec(rtclk[MC_DOM]);
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mon = hexdectodec(rtclk[MC_MONTH]);
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yr = hexdectodec(rtclk[MC_YEAR]);
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yr = (yr < 70) ? yr+100 : yr;
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n = sec + 60 * min + 3600 * hr;
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n += (dom - 1) * 3600 * 24;
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if (yeartoday(yr) == 366)
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month[1] = 29;
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for (i = mon - 2; i >= 0; i--)
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days += month[i];
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month[1] = 28;
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for (i = 70; i < yr; i++)
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days += yeartoday(i);
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n += days * 3600 * 24;
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n += tz.tz_minuteswest * 60;
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if (tz.tz_dsttime)
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n -= 3600;
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if (base < n - 5*SECYR)
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printf("WARNING: file system time much less than clock time\n");
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else if (base > n + 5*SECYR) {
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printf("WARNING: clock time much less than file system time\n");
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printf("WARNING: using file system time\n");
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goto fstime;
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}
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timeset = 1;
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time.tv_sec = n;
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time.tv_usec = 0;
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return;
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fstime:
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timeset = 1;
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time.tv_sec = base;
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time.tv_usec = 0;
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printf("WARNING: CHECK AND RESET THE DATE!\n");
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}
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/*
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* Reset the clock.
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*/
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void
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resettodr()
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{
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mc_todregs rtclk;
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time_t n;
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int diff, i, j;
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int s;
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/*
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* We might have been called by boot() due to a crash early
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* on. Don't reset the clock chip in this case.
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*/
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if (!timeset)
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return;
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s = splclock();
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if (rtcget(&rtclk))
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bzero(&rtclk, sizeof(rtclk));
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splx(s);
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diff = tz.tz_minuteswest * 60;
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if (tz.tz_dsttime)
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diff -= 3600;
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n = (time.tv_sec - diff) % (3600 * 24); /* hrs+mins+secs */
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rtclk[MC_SEC] = dectohexdec(n % 60);
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n /= 60;
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rtclk[MC_MIN] = dectohexdec(n % 60);
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rtclk[MC_HOUR] = dectohexdec(n / 60);
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n = (time.tv_sec - diff) / (3600 * 24); /* days */
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rtclk[MC_DOW] = (n + 4) % 7; /* 1/1/70 is Thursday */
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for (j = 1970, i = yeartoday(j); n >= i; j++, i = yeartoday(j))
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n -= i;
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rtclk[MC_YEAR] = dectohexdec(j - 1900);
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if (i == 366)
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month[1] = 29;
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for (i = 0; n >= month[i]; i++)
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n -= month[i];
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month[1] = 28;
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rtclk[MC_MONTH] = dectohexdec(++i);
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rtclk[MC_DOM] = dectohexdec(++n);
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s = splclock();
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rtcput(&rtclk);
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splx(s);
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}
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void
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setstatclockrate(arg)
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int arg;
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{
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}
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