1233 lines
45 KiB
Plaintext
1233 lines
45 KiB
Plaintext
SECTION 1 FLOATING POINT SOFTWARE PACKAGE TERMS.
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From: Microprocessor & Memory Technologies Group
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Semiconductor Products Sector
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6501 William Cannon Drive West,
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Mail Station OE33, Austin, Texas 78735-8598
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To: FLOATING POINT SOFTWARE PACKAGE USERS
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Date: August 27, 1993
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1.1 TITLE TO FLOATING POINT SOFTWARE PACKAGE FPSP
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Title to the 68040 Floating Point Software Package, all copies
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thereof (in whole or in part and in any form), and all rights
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therein, including all rights in patents, and copyrights,
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applicable thereto, shall remain vested in MOTOROLA. All
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rights, title and interest in the resulting modifications belong
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to MOTOROLA except where such modifications (a) are made
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solely for use with computer systems manufactured or
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distributed by user; (b) are themselves copyrightable; and (c)
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would not constitute a copyright infringement if not licensed
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hereunder.
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1.2 DISCLAIMER OF WARRANTY.
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THE 68040 FLOATING POINT SOFTWARE PACKAGE is provided on an
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"AS IS" basis and without other warranty except as stated herein.
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IN NO EVENT SHALL MOTOROLA BE LIABLE FOR INCIDENTAL OR
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CONSEQUENTIAL DAMAGES ARISING FROM USE OF THE 68040
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FLOATING POINT SOFTWARE PACKAGE. THIS DISCLAIMER OF
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WARRANTY EXTENDS TO ALL USERS OF THE THE 68040 FLOATING
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POINT SOFTWARE PACKAGE AND IS IN LIEU OF ALL WARRANTIES
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WHETHER EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
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IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR
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PARTICULAR PURPOSE.
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SECTION 2 Release 2.3 Errata
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As of this release, the following may be considered an
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errata of the 040 (Mask 20D43B Mask 4D50D and Mask 5D98D) FPSP:
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1. INEX1 reported by inexact conversion of packed source
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operand for a dyadic instruction will not be reported
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by the 040 upon completion of that instruction. This
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errata corresponds to errata "F5" on the 68040 Errata Sheet.
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Fixed in D98D.
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2. FREM and FMOD with packed operands will occasionally
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differ from the 881/2 results by one ulp in the conversion
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of the packed source operand.
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3. INEX2/AINEX are not calculated in the same manner as in the
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881/882 for some cases in which the result is overflowed.
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Currently, if the operation was an integer move-out, INEX2/AINEX
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is not set for any case.
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In some cases of fscale with integer input, the INEX2 bit will not
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be set on inex calculation.
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Under extended rounding precision, FSCALE results which underflow
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and are inexact may be incorrectly rounded. Inaddition, INEX2
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is not signaled in these cases.
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4. If an Fmove FPn,FPM(this also applies to the FNEG and FABS), is preceded by any floating point operation with a denorm source operand , the FMOVE
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destination (FPm) is incorrectly tagged and may result in silent data
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corruption. A software fix in release 2.2.
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SECTION 3 Software Specification for an MC68040 Floating-
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Point Software Package
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The purpose of this section is to provide an overview of
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the floating-point software package (FPSP) for the
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MC68040. The FPSP emulates the floating-point
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instructions of the MC68881/MC68882 which are not provided
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by the MC68040.
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3.1 DEFINITIONS, ACRONYMS, AND ABBREVIATIONS
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FPn - Floating-Point Data Register Source
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FPSP - Floating-Point Software Package
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FPU - Floating-Point Unit
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FPx - Floating-Point Data Register
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See the Glossary of Reference 1 for additional
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definitions.
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3.2 PRODUCT OVERVIEW
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The FPSP adds additional floating-point capabilities to
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the MC68040. A subset of the MC6888x instruction set is
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executed by the MC68040 on-chip FPU. The remaining
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floating-point instructions are emulated in software by
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the FPSP (see Reference 2). There are two types of FPSP:
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one for applications compiled for the MC68881/MC68882 and
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another for applications compiled for the MC68040 (see
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3.8.2 Packaging).
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The FPSP provides:
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* Arithmetic and Transcendental Instructions
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* Decimal Conversions
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* Exception Handlers
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* MC68040 Unimplemented Data Type and Data Format Handlers
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There are two types of users: 1) end users who are running
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applications and 2) system integrators who will install
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the package (see 3.8.3 Site Adaptations).
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3.3 GENERAL CONSTRAINTS
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The FPSP satisfies the requirements of the ANSI IEEE
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Standard for Binary Floating-Point Arithmetic 754. The
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FPSP runs old user code unchanged and is transparent for
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old code. The FPSP is easy to modify and install. The
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performance of the transcendental function routines is
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equivalent or superior to that of a 33-MHz
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MC68881/MC68882. The error bound is equivalent or
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superior to the MC68881/MC68882 (see 3.7.2 Accuracy).
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3.4 ASSUMPTIONS AND DEPENDENCIES
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The FPSP can be installed into any operating system. The
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MC68040 FPU shall be implemented as described in Reference
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2. Table 3-1 Lists the functions provided by the MC68040.
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3.5.2 Exceptions
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The main goal of the FPSP exception handlers is to provide
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the user with an easy path to port over existing MC68882
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exception handlers for use with the MC68040. The end
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result is that the FPSP provides an entry point so that
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once this point is reached, there is an indication that
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an IEEE-defined trap condition exist.
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3.5.2.1 BSUN <20> BRANCH/SET ON UNORDERED.
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On a trap-enabled condition, the FPSP updates the floating-point
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instruction address register (FPIAR) by copying the PC
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value in the pre-instruction stack frame to the FPIAR.
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Once this is done, the exceptional frame is restored
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without clearing the exception, and the program flow goes
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to the FPSP provided entry point. At the entry point the
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MC68040 is in an exceptional state, ready to execute the
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user-supplied exception handler.
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3.5.2.2 SNAN <20> SIGNALING NOT-A-NUMBER.
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On a trap-disabled condition, and if the destination format is B,
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W,or L, then the FPSP stores the most significant 8, 16, or
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32 bits, respectively, of the SNAN mantissa, with the SNAN
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bit set, to the destination. The FPSP discards the
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exceptional frame, then returns to the main program flow
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without entering the FPSP provided entry point, hence the
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user-provided exception handler is not executed.
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On a trap-enabled condition, the FPSP checks if the
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destination format is B, W, or L. Then, the FPSP stores
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the most significant 8, 16, or 32 bits, respectively, of
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the SNAN mantissa, with the SNAN bit set, to the
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destination. The FPSP then restores the exceptional frame
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without clearing the exception, and branches to the FPSP
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provided entry point. At the entry point, the MC68040 is
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in an exceptional state, ready to execute the user-
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supplied exception handler.
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3.5.2.3 OPERR <20> OPERAND ERROR.
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This exception traps through vector number 52.
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Table 3-3 shows the operand errors generated by the MC68040.
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Table 3-4 shows the operand errors generated by the FPSP.
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Note that the FPSP Unimplemented Instruction Handler
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detects and adds to the cases in which OPERR exceptions
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occur. Refer to Table 3-4 for these specific exception-
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causing conditions.
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On a trap-disabled condition, the FPSP checks if the
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operand error is caused by an FMOVE to a B, W, or L memory
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or integer data register destination. If it is caused by
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an integer overflow or if the floating-point data register
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to be stored contains infinity, the FPSP stores the
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largest positive or negative integer that can fit in the
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specified destination format size. If the destination is
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integer and the floating-point number to be stored is a
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NAN, then the 8, 16, or 32 most significant bits of the
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NAN significand is stored as a result.
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Next the FPSP checks for a false OPERR condition for an
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FMOVE to memory or integer data register. This condition
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occurs if the operand is equal to the largest negative
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integer representable in its format. The FPSP then stores
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the proper result, discards the exceptional frame, and
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returns to the main program flow without executing the
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user-supplied exception handler.
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On a trap-enabled condition, the FPSP does the same
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functions as the above trap-disabled condition, with the
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exception that in the end, the FPSP restores the
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exceptional frame without clearing the exception and
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branches to the FPSP supplied entry point instead of
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returning to the main program flow. At the FPSP supplied
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entry point, the MC68040 is in an exceptional state, ready
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to execute the user-supplied exception handler.
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3.5.2.4 OVFL <20> OVERFLOW.
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This exception traps through vector number 53.
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On a trap-disabled case, the FPSP stores the result in the
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destination as determined by the rounding mode at the
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destination as follows:
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Rounding Mode Result
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RN Infinity, with the sign of the intermediate result
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RZ Largest magnitude number, with the sign of the
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intermediate result.
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RM For positive overflow, largest positive
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number
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For negative overflow, infinity
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RP For positive overflow, infinity
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For negative overflow, largest negative
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number
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The FPSP then clears the appropriate exception bit in
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the frame and restores the non-exceptional frame into
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the MC68040, and then returns to the main program flow.
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On a trap-enabled case, the FPSP actions are identical to
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those found in the trap-disabled case, with the exception
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that instead of restoring a non-exceptional frame, the
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original exceptional frame is restored to the MC68040 and
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the FPSP branches to the FPSP supplied entry point. At
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this entry point, the MC68040 is in an exceptional state,
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ready to execute the user-supplied exception handler.
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3.5.2.5 UNFL <20> UNDERFLOW.
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This exception traps through vector number 51.
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On a trap-disabled case, the FPSP stores the result in the
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destination as determined by the rounding mode at the
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destination as follows:
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RN Zero with the sign of the intermediate result.
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RZ Zero with the sign of the intermediate result.
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RM For positive underflow, +zero. For negative
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underflow, the smallest denormalized
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negative number.
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RP For positive underflow, the smallest denormalized
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positive number. For negative underflow, -zero.
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The FPSP then clears the appropriate exception bit in the
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frame and restores the non-exceptional frame into the
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MC68040, and then returns to the main program flow.
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On a trap-enabled case, the FPSP actions are identical to
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those found in the trap-disabled case, with the exception
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that instead of restoring a non-exceptional frame, the
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original exceptional frame is restored to the MC68040 and
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the FPSP branches to the FPSP supplied entry point. At
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this entry point, the MC68040 is in an exceptional state,
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ready to execute the user-supplied exception handler.
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3.5.2.6 DZ <20> DIVIDE BY ZERO.
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Note that the FPSP Unimplemented Instruction Handler detects
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and adds to the cases in which DZ exceptions occur. Refer to
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Table 3-5 for these specific exception-causing conditions.
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Table 3-6 lists the DZ exceptions generated by the MC68040.
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The FPSP is not needed for this exception. The user-
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supplied exception handler is always entered. A system
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call is provided by the FPSP to calculate the exceptional
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operand.
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3.5.2.7 INEX1/INEX2 <20> INEXACT RESULT 1/2.
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Note that the FPSP Unimplemented Instruction Handler detects
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and allows INEX1 exceptions to occur. Furthermore, many new
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cases of INEX2 exceptions may be generated by the FPSP
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Unimplemented Instruction Handler as well. The INEX1
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exception traps into this handler as well as INEX2
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exceptions.
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The FPSP is not needed for this exception. The user-
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supplied exception handler is always entered.
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3.5.3 Instructions
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The following paragraphs describe the arithmetic and
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transcendental instructions supported by the FPSP.
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3.5.3.1 ARITHMETIC.
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Table 3-7 shows the arithmetic instructions supported by the FPSP.
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3.5.3.2 TRANSCENDENTAL.
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Table 3-8 shows the transcendental instructions supported by the FPSP.
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3.6 EXTERNAL INTERFACE REQUIREMENTS
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For end users the FPSP is transparent; system Integrators
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will integrate the FPSP into their system. (See 3.8.3.
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Site Adaptations)
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For applications compiled for the MC68881/MC68882 the FPSP
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provides kernel routines to support the MC68040
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unimplemented instructions. The MC68040 uses vector
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number 11 for the unimplemented instructions. The MC68040
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stack frames are different for unimplemented
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MC68881/MC68882 instructions and other F-line traps. For
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applications compiled for the MC68040 the unimplemented
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instructions are contained in a library (to avoid the
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F_line trap overhead at runtime).
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For both applications the FPSP provides kernel routines to
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support exceptions (vectors 48<34>54) and unsupported data
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types (vector 55).
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3.7 PERFORMANCE REQUIREMENTS
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The following paragraphs describe the speed, accuracy, and
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compatibility requirements for the FPSP.
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3.7.1 Speed
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The performance of the transcendental function routines is
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equivalent or superior to that of a 33-MHz
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MC68881/MC68882.
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3.7.2 Accuracy
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The following paragraphs describe the arithmetic
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instructions, transcendental instructions, and decimal
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conversions for the FPSP.
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3.7.2.1 ARITHMETIC INSTRUCTIONS.
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The error bound is one-half unit in the last place of the
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destination format in the round-to-nearest mode, and one
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unit in the last place in the other rounding modes.
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3.7.2.2 TRANSCENDENTAL INSTRUCTIONS.
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The error bound is less than 0.502 ulp of double precision.
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3.7.2.3 DECIMAL CONVERSIONS.
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The error bound is 0.97 unit in the last digit of the
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destination precision for the round-to-nearest mode; and
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1.47 units in the last digit of the destination precision for
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the other rounding modes.
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3.7.3 Compatibility
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The FPSP transcendental calculation results are not the
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same as for the MC68881/MC68882. This is because the
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algorithms used by the MC68881/MC68882 (CORDIC) cannot be
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effectively implemented in software. All other
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calculations are identical. The error bound is equivalent
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or superior to the MC68881/MC68882.
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3.8 OTHER REQUIREMENTS
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The following paragraphs describe other requirements for
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the FPSP, such as maintainability, packaging, and site
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adaptations.
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3.8.1 Maintainability
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The speed requirements have forced writing most of the
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package in assembly language.
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3.8.2 Packaging
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There are two versions of the FPSP. The FPSP Kernel
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Version is used to execute pre-existing user object code
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written for the MC68882. This is installed as part of the
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operating system. User applications need not be recompiled
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or modified in any way once the FPSP Kernel Version is
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installed.
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The FPSP Library Version is used to compile code that uses
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only the MC68040-implemented floating point instructions.
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The library version provides less overhead than the FPSP
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Kernel Version. Other features of this library includes
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ABI compliance as well as IEEE exception-reporting
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compliant. It is not however, UNIX exception-reporting
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compliant. The FPSP is not yet available in library
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format.
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3.8.3 Site Adaptations
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Some of the entries in the vector table needs to point to
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entry points within the FPSP Kernel Version. For those
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vectors the FPSP displaces, an entry point is provided to
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replace that which it takes. Note that former MC68882
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floating-point exception handlers need to go through minor
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modifications to account for the differences between the
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MC68040 and MC68882 floating point exceptional state
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frames. The FPSP provides skeleton code for each floating-
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point exception handler to aid in porting the MC68882
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floating-point exception handlers.
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For systems and applications that never set any of the
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exception bits in the FPCR, or if the former MC68882
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floating-point exception handlers only contain minimum
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code needed to clear the exception and return, no work is
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needed and the FPSP is a drop-in package.
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The FPSP Library Version needs to "intercept" the
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appropriate math library calls which use MC68882
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transcendental instructions. Since each site has different
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naming conventions, the FPSP subroutines need to be
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renamed accordingly and recompiled. The resident compiler
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also needs to provide a library path search pattern such
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that the FPSP is given a chance to resolve those
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trancendentals instructions.
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3.8.4 Stack Area Usage
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To achieve code re-entrace, the FPSP allocates context-
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sensitive variables on the stack. The FPSP does not
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require more than 512 bytes on the stack per context. This
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may be an installation concern for UNIX applications in
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which there is a limited UBLOCK area, and that the system
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stack resides there.
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3.8.5 ROM-based applications
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One of the goals of the FPSP Kernel Version is to be able
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to fit in a read-only space of no more than 64 KBytes.
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There are two main sections that need to reside in ROM.
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The text section, and the initialized data section. The
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text section accounts for 65% while the initialized data
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section accounts for 35%.
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3.9 FPSP KERNEL VERSION INSTALLATION NOTES
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The following paragraphs provide the MC68882 users with an
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understanding of the issues involved in porting over the
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FPSP into existing MC68030/MC68882 systems. Once these
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issues are understood, then the actual installation is
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explained.
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3.9.1 Differences between the MC68040 and MC68882
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Floating-point Exception Handling
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The main reason for providing the FPSP is to provide
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MC68882 compatibility. If the installer understands the
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main differences between the MC68882 and MC68040 in the
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area of floating-point exception handlers, skip this
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section and go to the next section.
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There are three areas that differ between the MC68040 and
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MC68882.
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The first difference is that of unimplemented
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instructions. The FPSP handles this by means of the F-line
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exception handling. This means that if there is an
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existing F-line handler, the FPSP replaces the existing F-
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line exception handler, but provides an alternate entry
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point for the existing F-line handler.
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The second difference is unsupported data types. The
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MC68040 provides a new entry point in the vector table,
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therefore no existing handler is replaced by the FPSP.
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There are no installation issues here.
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The third difference is that of floating point exception
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differences. This issue is more involved and requires
|
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further explanations.
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||
The IEEE standard allows the user to enable or disable
|
||
each floating point exception individually. If an
|
||
exceptional condition occurs, the IEEE defines a specific
|
||
action for the trap-disabled condition, and it also
|
||
defines certain specific actions for a trap-enabled
|
||
condition. The IEEE standard however, does not constrain
|
||
the implementation of exception handling; both software
|
||
and hardware can be used.
|
||
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The MC68882 supports the IEEE exception handling
|
||
compliance totally in hardware. For example, a user-
|
||
disabled (trap disabled) exception will cause the
|
||
specified IEEE defined actions for user-disabled exception
|
||
handling to occur. Similarly, user-enabled exceptions
|
||
will cause the MC68882 to take the exception as defined by
|
||
the IEEE trap enabled case.
|
||
|
||
The MC68040 provides full IEEE trap-disabled exception
|
||
handling compliance for the INEX and DZ exceptions. Just
|
||
as the MC68882, the MC68040 takes these exceptions only
|
||
for an IEEE trap-enabled condition. Existing MC68882
|
||
handlers have a minimum code requirement as defined by the
|
||
MC68882 User's Manual. As the MC68882 handlers, the
|
||
MC68040 handlers have a minimum code requirement as well.
|
||
The FPSP provides this minimum code requirement.
|
||
|
||
The MC68040 does not provide full IEEE exception
|
||
compliance on IEEE defined trap-disabled conditions for
|
||
the following exceptions: OVFL, UNFL, OPERR, SNAN. For
|
||
these exceptions, the MC68040 may take an exception even
|
||
on an IEEE-defined trap-disabled condition. The FPSP
|
||
provided exception handlers decide if its job is to
|
||
implement IEEE trap-disabled exception compliance, (and
|
||
therefore not execute the user supplied exception handler)
|
||
or to implement IEEE trap-enabled exception compliance,
|
||
(hence executing the user supplied exception handler). The
|
||
FPSP provides a user entry point so that when this entry
|
||
point is taken an IEEE-defined trap-enabled condition has
|
||
definitely occurred. At this specified entry point, an
|
||
exception handler written for the MC68882 needs to be
|
||
modified to account for MC68040 stack differences, and
|
||
then placed at the user entry point.
|
||
|
||
As with the MC68882, there is a minimum code requirement
|
||
for the MC68040 handler, but this minimum code is provided
|
||
by the FPSP.
|
||
|
||
From an installation perspective, the OVFL, UNFL, OPERR,
|
||
SNAN exception handlers are replaced by the FPSP handlers,
|
||
but the FPSP provides an entry point so that MC68882-like
|
||
exception handlers may be written. Furthermore, minimum
|
||
code is provided by the FPSP and can be used as a
|
||
template.
|
||
|
||
The BSUN exception is different in that unlike the
|
||
previous exception handlers, the difference between the
|
||
MC68882 and MC68040 resides in the IEEE-defined trap
|
||
enabled case. The FPSP handles this by performing the
|
||
patch needed for MC68882 compatibility, and then restoring
|
||
the exception to the MC68040 without performing the
|
||
necessary steps to clear the BSUN exception. The
|
||
exceptional frame is restored into the MC68040 and the
|
||
FPSP branches to the user entry point provided. At this
|
||
entry point, an MC68882-like exception handler written for
|
||
the MC68040 is executed without having to worry about the
|
||
built-in incompatibility. Although this method incurs a
|
||
performance hit, it frees the user-defined exception
|
||
handler from having to write the code needed to implement
|
||
MC68882 code compatibility. As with the other exception
|
||
handlers, the FPSP provides the minimum code needed.
|
||
|
||
In summary, the FPSP replaces the following exception
|
||
handlers and provides an entry-point for MC68882-like
|
||
exception handlers for these exceptions: OVFL, UNFL,
|
||
OPERR, SNAN, BSUN, F-line.
|
||
|
||
The FPSP is not needed for the INEX and DZ exception
|
||
handlers, and these exception handlers just need to be
|
||
MC68882-like.
|
||
|
||
|
||
3.9.2 Vector Table
|
||
|
||
The entry point into the FPSP is achieved by having the
|
||
appropriate vector table offset point to a specified entry
|
||
point within the FPSP. For simplicity, all of the FPSP
|
||
main entry points are found in the file skeleton.sa.
|
||
Table 3-9 shows the vector table offset and the
|
||
appropriate labels within the file skeleton.sa that it
|
||
needs to point to. Figure 3-1 shows a flowchart of the
|
||
entry points.
|
||
|
||
Once the entry point is reached, the user may add some
|
||
user-specific code prior to jumping to the FPSP routines (
|
||
FPSP routines are prefixed by "fpsp_"). After the jump to
|
||
the FPSP routines, the FPSP performs its function and then
|
||
jumps to the FPSP supplied entry points (if needed) found
|
||
in the file skeleton.sa.
|
||
|
||
|
||
3.9.3 FPSP Supplied Entry Points
|
||
|
||
To replace the vector table entries it displaces, the FPSP
|
||
provides an alternate entry point. For simplicity, all of
|
||
the FPSP supplied entry points are found in the file
|
||
skeleton.sa. The FPSP supplied F-line exception entry
|
||
point is straight-forward. An F-line exception handler
|
||
written for an MC68030 can be placed here without
|
||
modifications. The Unsupported Data Type exception handler
|
||
is newly-defined, it does not displace any MC68030/MC68882
|
||
exception handler. Therefore, the FPSP does not provide an
|
||
alternate entry point for this exception.
|
||
|
||
The alternate entry points have the naming convention such
|
||
that the specified exception handler is prefixed by
|
||
"real_". For instance, the entry point for user-supplied
|
||
BSUN exception handler is named "real_bsun".
|
||
|
||
For the floating-point exception handlers (BSUN, OPERR,
|
||
SNAN, DZ, OVFL, and UNFL) previously written for an
|
||
MC68882 based system, these handlers need to be modified
|
||
slightly for use with the MC68040. Once these handlers are
|
||
modified, they are then placed in the FPSP provided entry
|
||
points.
|
||
|
||
|
||
3.9.4 Extract the Hardware Independent portion of
|
||
the MC68882 handlers
|
||
|
||
To modify the existing MC68882 handlers, all of the code
|
||
used in accessing the MC68882 generated frame needs to be
|
||
stripped off. The code used in clearing an MC68882
|
||
exception (setting bit 27 of the BIU Flag) needs to be
|
||
stripped off as well. Only the hardware independent
|
||
portions of the MC68882 handlers may be used.
|
||
|
||
To aid the installer in rewriting the MC68882 exception
|
||
handlers, the file skeleton.sa provides the minimum code
|
||
necessary to clear the exception once the specific handler
|
||
is entered.
|
||
|
||
Once the hardware-independent portion is written, the
|
||
modified MC68882 handlers need to be integrated into the
|
||
portion of the code which is hardware dependent. The
|
||
minimum code needed by each exception handler is already
|
||
provided by the FPSP within the file skeleton.sa. The
|
||
following section describes the mechanics behind the
|
||
written code.
|
||
|
||
|
||
3.9.5 MC68040 Minimum Exception Code
|
||
|
||
This section describes the minimum requirements for the
|
||
user-supplied exception handlers. As mentioned in the
|
||
previous sections, these minimum handlers are provided as
|
||
part of the package, and this section is strictly for the
|
||
user's information only.
|
||
|
||
As with the MC68882, if all exceptions are always
|
||
disabled, no minimum code is necessary since the FPSP
|
||
guarantees that these FPSP provided entry points are never
|
||
entered on trap-disabled condition. Therefore, for
|
||
existing systems that do not provide exception handlers
|
||
for the MC68882, it is likely that the assumption that all
|
||
exceptions are always disabled is valid, and therefore no
|
||
user-defined MC68040 exception handlers are needed either.
|
||
|
||
The above paragraph should not be interpreted to mean that
|
||
the FPSP provided exception handlers are unnecessary. On
|
||
the contrary, the FPSP provided exception handlers are
|
||
needed, and that these FPSP exception handlers provide the
|
||
entry points for user-defined exception handlers. Whether
|
||
or not the user-defined MC68040 exception handers are
|
||
needed is the issue being discussed.
|
||
|
||
Assuming that it is possible that the exceptions are
|
||
enabled at some point, the minimum exception handler is
|
||
similar to that defined for an MC68882. As with the
|
||
MC68882, the MC68040 requires that the first floating
|
||
point instruction be an FSAVE. Unlike the
|
||
MC68882, the MC68040 does not always require an equivalent
|
||
FRESTORE. For an E1 exception, only the FSAVE requirement
|
||
is needed, the state frame may be discarded. The E3
|
||
exception is more similar to that found in an MC68882. As
|
||
with the MC68882, the E3 exception requires an FSAVE, an
|
||
instruction that clears the exception in the resulting
|
||
FSAVE stack, followed by an FRESTORE.
|
||
|
||
If both E3 and E1 exceptions exist at the same time, then
|
||
the exception is handled as though it were an E3
|
||
exception. After which, the MC68040 re-traps to handle the
|
||
E1 exception.
|
||
|
||
The E3 exception can only be reported by the following
|
||
exception handlers: OVFL, UNFL, INEX. For these exception
|
||
handlers, this is the minimum code requirement:
|
||
1) FSAVE
|
||
2) if E3 bit set, goto (4), else goto (3)
|
||
3) E1 exception, throw away stack and RTE
|
||
4) Clear E3 bit, FRESTORE, RTE
|
||
|
||
The E3 exception cannot be reported by the following
|
||
exception handlers: SNAN, OPERR and DZ. Since only an E1
|
||
exception needs to be handled here, this is the minimum
|
||
code requirement:
|
||
1) FSAVE
|
||
2) throw away stack and RTE
|
||
|
||
For the BSUN exception handler, the minimum code
|
||
requirement is:
|
||
1) FSAVE
|
||
2) Do one of 4 methods described in MC68040 User's
|
||
Manual
|
||
3) throw away stack and RTE
|
||
|
||
If the above minimum code requirements are not met, then,
|
||
an infinitely looping exception sequence occurs.
|
||
|
||
|
||
3.9.6 Mem_read and Mem_write
|
||
|
||
The mem_write and mem_read subroutines are used by the
|
||
FPSP to read and write from user space. These routines
|
||
perform a UNIX system call to lcopyin and lcopyout. The
|
||
FPSP provides a simple version of lcopyin and lcopyout for
|
||
non-UNIX applications. Installation to UNIX-based systems
|
||
requires that the FPSP provided lcopyin and lcopyout be
|
||
deleted or commented out. For simplicity, these
|
||
subroutines are found in the file skeleton.sa.
|
||
|
||
The production version of the FPSP is fully re-entrant. If
|
||
a page fault occurs on either a mem_read or mem_write, the
|
||
operating system may perform a page-in operation and still
|
||
allow other processes to use the FPSP.
|
||
|
||
|
||
3.9.7 Increasing F-line Handler Performance
|
||
|
||
The FPSP was written to handle all possible cases of
|
||
MC68040 vs MC68030/MC68882 problem areas. Any performance
|
||
improvement in this handler increases floating-point
|
||
performance. The F-line handling may be made quicker by
|
||
pointing the vector table entry directly into the label
|
||
"fpsp_unimp" found in the file x_unimp.sa, if these
|
||
conditions are met:
|
||
|
||
1) That the system never has to execute an FMOVECR
|
||
instruction in which bits 0 to 5 of the F-line word are
|
||
non-zero.
|
||
|
||
2) An alternate F-line entry point is unnecessary.
|
||
This optimization saves a total of three instructions. ( 1
|
||
bra, 1 cmpi, 1 beq).
|
||
|
||
|
||
3.10 REFERENCES
|
||
|
||
1. MC68881UM/AD, MC68881/MC68882 Motorola Floating-Point
|
||
Coprocessor User's Manual. Motorola Inc., 1989
|
||
2. M68040UM/AD M68040 32-Bit Microprocessor User's
|
||
Manual, Motorola, Inc.,1992,
|
||
3. MC68020UM/AD, MC68020 32-Bit Microprocessor User's
|
||
Manual, Motorola, Inc., 1990.
|
||
4. MC68030UM/AD, MC68030 Enhanced 32-Bit Microprocessor
|
||
User's Manual, Motorola Inc., 1990
|
||
5. ANSI/IEEE Std. 754,1985 Standard for Binary Floating-
|
||
Point Arithmetic
|
||
6. M68000PM/AD REV. 1 Programmer's Reference Manual. Motorola Inc., 1992
|
||
|
||
|
||
3.11 Tables and Figures
|
||
|
||
Table 3-1. Functions Provided by MC68040
|
||
------------------------------------------------------------------
|
||
Name | Description
|
||
------------------------------------------------------------------
|
||
FMOVE Move to FPU
|
||
FMOVEM Move Multiple Registers
|
||
FSMOVE Single-Precision Move
|
||
FDMOVE Double-Precision Move
|
||
FCMP Compare
|
||
FABS Absolute Value
|
||
FSABS Single-Precision Absolute Value
|
||
FDABS Double-Precision Absolute Value
|
||
FTST Test
|
||
FNEG Negate
|
||
FSNEG Single-Precision Negate
|
||
FDNEG Double-Precision Negate
|
||
FADD Add
|
||
FSUB Subtract
|
||
FDIV Divide
|
||
FMUL Multiply
|
||
FBcc Branch Conditionally
|
||
FScc Set According to Condition
|
||
FDBcc Test Cond, Dec and Branch
|
||
FTRAPcc Trap Conditionally
|
||
FSADD Single-Precision Add
|
||
FSSUB Single-Precision Subtract
|
||
FSMUL Single-Precision Multiply
|
||
FSDIV Single-Precision Divide
|
||
FDADD Double-Precision Add
|
||
FDSUB Double-Precision Subtract
|
||
FDMUL Double-Precision Multiply
|
||
FDDIV Double-Precision Divide
|
||
FSQRT Square Root
|
||
FSSQRT Single-Precision Square Root
|
||
FDSQRT Double-Precision Square Root
|
||
FNOP No Operation
|
||
FSAVE Save Internal State
|
||
FRESTORE Restore Internal State
|
||
FSGLDIV Single-Precision Divide (68882 compatible)
|
||
FSGLMUL Single-Precision Multiply (68882 compatible)
|
||
------------------------------------------------------------------
|
||
|
||
|
||
Table 3-2. Support for Data Types and Data Formats
|
||
------------------------------------------------------------------
|
||
| Data Formats
|
||
|----------------------------------------------------
|
||
Data Types | SGL | DBL | EXT | Dec | Byte | Word | Long
|
||
------------------------------------------------------------------
|
||
Norm * * * @ * * *
|
||
Zero * * * @ * * *
|
||
Infinity * * * @
|
||
NaN * * * @
|
||
Denorm # # @ @
|
||
Unnorm @ @
|
||
------------------------------------------------------------------
|
||
Notes:
|
||
@ = supported by FPSP
|
||
* = supported by the MC68040 FPU
|
||
# = supported by FPSP after being converted to extended precision by
|
||
MC68040
|
||
|
||
|
||
Table 3-3. Operand Errors Handled by the MC68040
|
||
------------------------------------------------------------------
|
||
Instruction | Conditions Causing Operand Error
|
||
------------------------------------------------------------------
|
||
FADD ( + inf )+( - inf ) or (- inf )+( + inf )
|
||
FSUB ( + inf )-( + inf ) or (- inf )-(- inf )
|
||
FMUL ( 0 ) x ( inf ) or ( inf ) x ( 0 )
|
||
FDIV 0 / 0 or inf / inf
|
||
FMOVE.BWL Integer overflow, Source is NaN, or Source is inf
|
||
FSQRT Source < 0, Source = - inf
|
||
------------------------------------------------------------------
|
||
|
||
|
||
|
||
Table 3-4. Operand Errors Generated by the FPSP
|
||
------------------------------------------------------------------
|
||
Instruction | Condition Causing Operand Error
|
||
------------------------------------------------------------------
|
||
FSADD ( + inf )+( - inf ) or ( - inf )+( + inf )
|
||
FDADD ( + inf )+( - inf ) or ( - inf )+( + inf )
|
||
FSSUB ( + inf )-( + inf ) or ( - inf )-( - inf )
|
||
FDSUB ( + inf )-( + inf ) or ( - inf )-( - inf )
|
||
FSMUL ( 0 ) x ( inf ) or ( inf ) x ( 0 )
|
||
FDMUL ( 0 ) x ( inf ) or ( inf ) x ( 0 )
|
||
FSDIV 0 / 0 or inf / inf
|
||
FDDIV 0 / 0 or inf / inf
|
||
FCOS Source is +/- inf
|
||
FSIN Source is +/- inf
|
||
FTAN Source is +/- inf
|
||
FACOS Source is +/- inf, > +1, or < -1
|
||
FASIN Source is +/- inf, > +1, or < -1
|
||
FATANH Source is > +1, or < -1, Source = <20> inf
|
||
FSINCOS Source is +/- inf
|
||
FGETEXP Source is +/- inf
|
||
FGETMAN Source is +/- inf
|
||
FLOG10 Source is < 0, Source = - inf
|
||
FLOG2 Source is +/- inf, > +1, or < -1
|
||
FLOGN Source is +/- inf, > +1, or < -1
|
||
FLOGNP1 Source is < -1, Source is = - inf
|
||
FMOD FPx is +/- inf or Source is 0, Other Operand is not a
|
||
NaN
|
||
FMOVE to P Result Exponent > 999 (Decimal) or k-Factor > +17
|
||
FREM FPx is +/- inf or Source, Other Operand is not a NaN
|
||
FSCALE Source is +/- inf, Other Operand is not a NaN
|
||
------------------------------------------------------------------
|
||
|
||
Table 3-5. DZ Exceptions Generated by the FPSWP
|
||
------------------------------------------------------------------
|
||
<EFBFBD> Instruction | Condition Causing DZ Exception
|
||
------------------------------------------------------------------
|
||
FATANH Source Operand = $ + -$1
|
||
FLOG10 Source Operand = 0
|
||
FLOG2 Source Operand = 0
|
||
FLOGN Source Operand = 0
|
||
FLOGNP1 Source Operand = -1
|
||
FSGLDIV Source Operand = 0 and FPn is not a NaN, Infinity,
|
||
or 0
|
||
------------------------------------------------------------------
|
||
|
||
|
||
Table 3-6. DZ Exceptions Generated by the MC68040
|
||
------------------------------------------------------------------
|
||
Instruction | Condition Causing DZ Exception
|
||
------------------------------------------------------------------
|
||
FDIV Source Operand = 0 and FPn is not a NaN, Infinity,
|
||
or 0
|
||
FSDIV Source Operand = 0 and FPn is not a NaN, Infinity,
|
||
or 0
|
||
FDDIV Source Operand = 0 and FPn is not a NaN, Infinity,
|
||
or 0
|
||
------------------------------------------------------------------
|
||
|
||
|
||
Table 3-7. Arithmetic Instructions
|
||
------------------------------------------------------------------
|
||
Name | Description
|
||
------------------------------------------------------------------
|
||
FADD* Add
|
||
FSUB* Subtract
|
||
FSADD*+ Single-Precision Add
|
||
FSSUB*+ Single-Precision Subtract
|
||
FDADD*+ Double-Precision Add
|
||
FDSUB*+ Double-Precision Subtract
|
||
FMUL* Multiply
|
||
FDIV* Divide
|
||
FSMUL*+ Single-Precision Multiply
|
||
FSDIV*+ Single-Precision Divide
|
||
FDMUL*+ Double-Precision Multiply
|
||
FDDIV*+ Double-Precision Divide
|
||
FINT Integer Part
|
||
FINTRZ Integer Part (Truncated)
|
||
FABS* Absolute Value
|
||
FNEG* Negate
|
||
FGETEXP Get Exponent
|
||
FGETMAN Get Mantissa
|
||
FTST* Test Operand
|
||
FCMP* Compare
|
||
FREM IEEE Remainder
|
||
FSCALE Scale Exponent
|
||
FMOVE* Move FP data register
|
||
FSMOVE* Single-Precision Move
|
||
FDMOVE* Double-Precision Move
|
||
FSQRT* Square Root
|
||
FSSQRT* Single-Precision Square Root
|
||
FTWOTOX 2 to the X Power
|
||
FMOD Modulo Remainder
|
||
FDSQRT* Double-Precision Square Root
|
||
FDMOD Double-Precision Modulo Remainder
|
||
FSMOD Single-Precision Modulo Remainder
|
||
------------------------------------------------------------------
|
||
Notes:
|
||
* The FPSP provides these functions for all decimal data formats,
|
||
single, double, and extended denormalized data types, and extended
|
||
unnormalized data types. The MC68040 provides these functions
|
||
for the remaining formats and types (See page 11 of Reference 2).
|
||
+ Additional functions which are not provided by the MC68881/MC68882.
|
||
|
||
|
||
Table 3-8. Transcendental Instructions
|
||
------------------------------------------------------------------
|
||
Name | Description
|
||
------------------------------------------------------------------
|
||
FCOS Cosine
|
||
FSIN Sine
|
||
FACOS Arc Cosine
|
||
FASIN Arc Sine
|
||
FCOSH Hyperbolic Cosine
|
||
FSINH Hyperbolic Sine
|
||
FSINCOS Simultaneous Sine & Cosine
|
||
FATAN Arc Tangent
|
||
FTAN Tangent
|
||
FATANH Hyperbolic Arc Tan
|
||
FTANH Hyperbolic Tangent
|
||
FLOG10 Log Base 10
|
||
FLOG2 Log Base 2
|
||
FLOGNP1 Log Base e of (x+1)
|
||
FLOGN Log Base e
|
||
FETOXM1 (e to the x Power) -1
|
||
FETOX e to the x Power
|
||
FTWOTOX 2 to the x Power
|
||
FTENTOX 10 to the x Power
|
||
------------------------------------------------------------------
|
||
|
||
|
||
Table 3-9. FPSP Provided Entry Points
|
||
------------------------------------------------------------------
|
||
Exception Type | Vector Table | FPSP entry | User entry
|
||
| (offset) | point | point
|
||
------------------------------------------------------------------
|
||
F-line unimplemented vector 11 ($2C) fline real_fline
|
||
float instruction
|
||
------------------------------------------------------------------
|
||
Branch or set on vector 48 ($20) bsun real_bsun
|
||
unordered
|
||
------------------------------------------------------------------
|
||
Inexact vector 49 ($C4) inex real_inex
|
||
------------------------------------------------------------------
|
||
Divide-by-zero vector 50 ($C8) dz real_dz
|
||
------------------------------------------------------------------
|
||
Underflow vector 51 ($CC) unfl real_unfl
|
||
------------------------------------------------------------------
|
||
Operand error vector 52 ($D0) operr real_operr
|
||
------------------------------------------------------------------
|
||
Overflow vector 53 ($D4) ovfl real_ovfl
|
||
------------------------------------------------------------------
|
||
Signalling Not-A- vector 54 ($D8) snan real_snan
|
||
Number
|
||
------------------------------------------------------------------
|
||
Unsupported data type vector 55 ($DC) unsupp
|
||
------------------------------------------------------------------
|
||
|
||
|
||
File: skeleton.sa
|
||
|---------------------|
|
||
| | File: x_unfl.sa
|
||
| | |----------------------|
|
||
VECTOR | | | |
|
||
TABLE | | /->|fpsp_unfl: |
|
||
|------------| /->|unfl: | | | . |
|
||
| | | | jmp fpsp_unfl ----|-/ | . |
|
||
| | | | | | . |
|
||
vbr+$cc |addr of unfl|-/ | | | HANDLE NON-MASKABLE |
|
||
| | |real_unfl: <--------|--\ | EXCEPTION CONDITION |
|
||
| | | . | | | . |
|
||
| | | . | | | . |
|
||
| | | . | | | . |
|
||
| | | USER TRAP HANDLER | | | |
|
||
|------------| | . | | | if FPCR Exception |
|
||
| . | | | Byte UNFL bit set,|
|
||
| . | \-|-- jmp real_unfl |
|
||
|rte . | | else rte |
|
||
| | |----------------------|
|
||
|---------------------|
|
||
Figure 3-1 FPSP Entry Points
|
||
|
||
|
||
|
||
SECTION 4 FPSP Library Version
|
||
|
||
4.1 When to use the FPSP Library Version.
|
||
|
||
The FPSP Library Version is intended to provide better performance for
|
||
trancendental instructions. It gets its performance by avoiding the
|
||
overhead involved in F-line trap emulation, as used by the Unimplemented
|
||
Instruction Handler. The FPSP Library Version is optional, and user code
|
||
needs to be recompiled to make use of it.
|
||
|
||
|
||
4.2 Installation Notes
|
||
|
||
The library version of the FPSP can be built by running 'make libFPSP.a'
|
||
from either the Makefile (for asm syntax) or fpsp.mk (for as syntax).
|
||
The 'make convert' step in Makefile will build both kernel and library .s
|
||
files from the .sa sources. Change the SYS= and PREFIX= variables
|
||
in Makefile BEFORE running 'make convert'. Three templates are supplied
|
||
for building the library version: GEN, CI5 and R3V6. The GEN templates
|
||
generate entry points for single, double and extended precision routines and
|
||
provide the closest emulation of the kernel FPSP. The CI5 and R3V6
|
||
templates are faster, but discard most of the condition code and control
|
||
register handling, and only provide the double precision entry points.
|
||
|
||
The entry point names are contained in L_LIST. Change the first 3
|
||
entries of each line to suit your system.
|
||
|
||
|
||
4.3 Differences in the library version:
|
||
|
||
1.) Single and Double precision SNAN's will not generate an SNAN
|
||
exception because they are converted to extended precision
|
||
and doing so causes them to turn into non-signalling NAN's.
|
||
|
||
Example: facos.d 7ff7_ffff_ffff_ffff snan
|
||
|
||
2.) An enabled Inexact exception may not be taken in all cases.
|
||
|
||
Example: facos.x 000000000000000000000001 d inex2
|
||
fint.x 403d_0000_aaaa_aaaa_aaaa_ffff inex2
|
||
|
||
3.) The return value in fp0 is undefined when an enabled OPERR or DZ
|
||
exception ocurrs. In the kernel FPSP, the destination register
|
||
is unchanged.
|
||
|
||
4.)fscale does not return the right result when an underflow ocurrs.
|
||
The problem is that the t_unfl code in the l_support.sa file
|
||
cannot exactly mimic the kernel FPSP version because the incoming
|
||
FPCR is not in the same place every time.
|
||
|
||
|
||
4.4 Changes in the library version of FPSP rel 2.3:
|
||
|
||
A floating point exception occurs when a transcendentals called twice.
|
||
example: main()
|
||
{ double d;
|
||
d= 0.0;
|
||
x = facosd(0.0);
|
||
y = facosd(d);
|
||
}
|
||
This is fixed in release 2.2 of FPSP.
|
||
A followup on the above bug was to restore the fpcr beforw it unlinks.
|
||
This is fixed in release 2.3 of FPSP.
|
||
|
||
|
||
4.5 Performance
|
||
|
||
Overall, the library version is twice as fast as the kernel code.
|
||
|
||
|
||
APPENDIX A BUG TEMPLATE
|
||
|
||
Use the template below when reporting bugs.
|
||
|
||
Any fields designated with an asterick (*) can be left blank.
|
||
When complete, please fax the report to the following
|
||
phone number :
|
||
|
||
(800) 248-8567
|
||
|
||
To assist you in filling out this form, a description of each field follows
|
||
the template.
|
||
Should you have any questions, please fax us at the above number.
|
||
----------------------------------------------------------------------------
|
||
|
||
Problem# (0-0000)
|
||
|
||
Key Words
|
||
|
||
Severity (1,2,3)
|
||
|
||
Customer Description
|
||
|
||
Long Description
|
||
|
||
System Description
|
||
|
||
Date Reported
|
||
|
||
Reported By
|
||
|
||
Phone
|
||
|
||
*Resolved?
|
||
|
||
*Date Resolved
|
||
|
||
*Who fixed
|
||
|
||
*Correction Description
|
||
|
||
*Modules Affected
|
||
|
||
Problem Release/Load
|
||
|
||
*Test suite passed
|
||
|
||
*sccs version control
|
||
|
||
---------------------------------------------------------------------------
|
||
|
||
The following is a brief description of how to use the bug report template.
|
||
|
||
---------------------------------------------------------------------------
|
||
|
||
Problem# (0-0000) You may include a number that you will use internally
|
||
to track this bug. We will log it but assign our own
|
||
# to track your bug repair. Please choose one person
|
||
as the individual to send in all bug reports for your
|
||
firm. This should help avoid confusion and ensure a
|
||
smooth working relationship.
|
||
|
||
Key Words Indicate the key terms associated with this bug
|
||
report. For example: fpcr, denorm
|
||
|
||
Severity (1,2,3,4,5) This indicates the severity of the bug.
|
||
The following descriptions are taken from AT&T test
|
||
document:
|
||
1: an error that causes the FPSP to crash and no
|
||
further work can be done. An error that causes gross
|
||
deviations of results. Non-waiverable compliance
|
||
violations are also severity 1.
|
||
2: an error that represents a substantial deviation in
|
||
the functionality of the FPSP or deviation from
|
||
IEEE 754 standard.
|
||
3: an error that represents a deviation in the
|
||
functionality. However, the customer is able to
|
||
implement a workaround to this problem.
|
||
4: an error that represents a minor deviation or
|
||
incorrect documentation.
|
||
5: a request for product enhancement.
|
||
|
||
|
||
Customer Description This is a brief description of the problem.
|
||
|
||
Long Description This is a more detailed description of the problem.
|
||
This could contain a short code fragment, a
|
||
suggested fix for the bug or reference a longer
|
||
file with this type of information in it.
|
||
|
||
System Description This is a brief description of your system.
|
||
|
||
Date Reported MM/DD/YY
|
||
|
||
Reported By Your name
|
||
|
||
Phone Enter your telephone number including the
|
||
area code.
|
||
|
||
*Resolved? Enter "yes" or "no" only.
|
||
|
||
*Date Resolved When the bug is fixed the date it was fixed
|
||
will be entered by us in this field.
|
||
|
||
*Who fixed Name of the person who fixed the bug.
|
||
|
||
*Correction Description When the bug is fixed we will enter a
|
||
description of the fix in this field.
|
||
|
||
*Modules Affected When the bug is fixed we will enter the
|
||
module name.
|
||
|
||
|
||
Problem Release/Load Enter the release or load information in this
|
||
field. This information should be on the label
|
||
for the tape that was sent to you.
|
||
|
||
*Test suite passed You do not need to fill out this field. This is
|
||
the test suite file that we use to verify bugs
|
||
and/or fixes.
|
||
|
||
*sccs version control You do not need to fill out this field. This is
|
||
the sccs version that contains the fix.
|
||
|