357 lines
9.1 KiB
C
357 lines
9.1 KiB
C
/* $NetBSD: rlphy.c,v 1.15 2007/05/09 23:16:37 tsutsui Exp $ */
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/* $OpenBSD: rlphy.c,v 1.20 2005/07/31 05:27:30 pvalchev Exp $ */
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/*
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* Copyright (c) 1998, 1999 Jason L. Wright (jason@thought.net)
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Driver for the internal PHY found on RTL8139 based nics, based
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* on drivers for the 'exphy' (Internal 3Com phys) and 'nsphy'
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* (National Semiconductor DP83840).
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*/
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/*
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* Ported to NetBSD by Juan Romero Pardines <xtraeme@NetBSD.org>
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: rlphy.c,v 1.15 2007/05/09 23:16:37 tsutsui Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <sys/socket.h>
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#include <sys/errno.h>
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#include <net/if.h>
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#include <net/if_media.h>
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#include <dev/mii/miidevs.h>
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#include <machine/bus.h>
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#include <dev/ic/rtl81x9reg.h>
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struct rlphy_softc {
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struct mii_softc sc_mii;
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int sc_rtl8201l;
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};
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int rlphymatch(struct device *, struct cfdata *, void *);
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void rlphyattach(struct device *, struct device *, void *);
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CFATTACH_DECL(rlphy, sizeof(struct rlphy_softc),
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rlphymatch, rlphyattach, mii_phy_detach, mii_phy_activate);
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int rlphy_service(struct mii_softc *, struct mii_data *, int);
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void rlphy_status(struct mii_softc *);
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static void rlphy_reset(struct mii_softc *);
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const struct mii_phy_funcs rlphy_funcs = {
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rlphy_service, rlphy_status, rlphy_reset,
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};
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static const struct mii_phydesc rlphys[] = {
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{ MII_OUI_yyREALTEK, MII_MODEL_yyREALTEK_RTL8201L,
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MII_STR_yyREALTEK_RTL8201L },
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{ MII_OUI_ICPLUS, MII_MODEL_ICPLUS_IP101,
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MII_STR_ICPLUS_IP101 },
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{ 0, 0,
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NULL },
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};
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int
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rlphymatch(struct device *parent, struct cfdata *match, void *aux)
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{
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struct mii_attach_args *ma = aux;
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if (mii_phy_match(ma, rlphys) != NULL)
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return (10);
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if (MII_OUI(ma->mii_id1, ma->mii_id2) != 0 ||
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MII_MODEL(ma->mii_id2) != 0)
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return 0;
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if (!device_is_a(parent, "rtk") && !device_is_a(parent, "re"))
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return 0;
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/*
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* A "real" phy should get preference, but on the 8139 there
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* is no phyid register.
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*/
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return 5;
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}
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void
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rlphyattach(struct device *parent, struct device *self, void *aux)
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{
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struct rlphy_softc *rsc = device_private(self);
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struct mii_softc *sc = &rsc->sc_mii;
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struct mii_attach_args *ma = aux;
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struct mii_data *mii = ma->mii_data;
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if (MII_MODEL(ma->mii_id2) == MII_MODEL_yyREALTEK_RTL8201L) {
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rsc->sc_rtl8201l = 1;
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aprint_normal(": %s, rev. %d\n", MII_STR_yyREALTEK_RTL8201L,
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MII_REV(ma->mii_id2));
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} else
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aprint_normal(": Realtek internal PHY\n");
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sc->mii_inst = mii->mii_instance;
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sc->mii_phy = ma->mii_phyno;
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sc->mii_funcs = &rlphy_funcs;
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sc->mii_pdata = mii;
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sc->mii_flags = ma->mii_flags;
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sc->mii_flags |= MIIF_NOISOLATE;
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PHY_RESET(sc);
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aprint_normal("%s: ", sc->mii_dev.dv_xname);
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sc->mii_capabilities =
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PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
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if (sc->mii_capabilities & BMSR_MEDIAMASK)
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mii_phy_add_media(sc);
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aprint_normal("\n");
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}
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int
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rlphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
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{
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struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
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int rv;
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if (!device_is_active(&sc->mii_dev))
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return ENXIO;
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/*
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* Can't isolate the RTL8139 phy, so it has to be the only one.
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*/
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if (IFM_INST(ife->ifm_media) != sc->mii_inst)
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panic("rlphy_service: attempt to isolate phy");
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switch (cmd) {
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case MII_POLLSTAT:
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break;
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case MII_MEDIACHG:
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/*
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* If the interface is not up, don't do anything.
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*/
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if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
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break;
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switch (IFM_SUBTYPE(ife->ifm_media)) {
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case IFM_AUTO:
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/*
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* If we're already in auto mode, just return.
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*/
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if (PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN)
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return (0);
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(void) mii_phy_auto(sc, 0);
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break;
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case IFM_100_T4:
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/*
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* XXX Not supported as a manual setting right now.
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*/
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return (EINVAL);
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default:
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/*
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* BMCR data is stored in the ifmedia entry.
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*/
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switch (ife->ifm_media &
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(IFM_TMASK|IFM_NMASK|IFM_FDX)) {
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case IFM_ETHER|IFM_10_T:
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rv = ANAR_10|ANAR_CSMA;
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break;
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case IFM_ETHER|IFM_10_T|IFM_FDX:
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rv = ANAR_10_FD|ANAR_CSMA;
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break;
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case IFM_ETHER|IFM_100_TX:
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rv = ANAR_TX|ANAR_CSMA;
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break;
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case IFM_ETHER|IFM_100_TX|IFM_FDX:
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rv = ANAR_TX_FD|ANAR_CSMA;
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break;
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case IFM_ETHER|IFM_100_T4:
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rv = ANAR_T4|ANAR_CSMA;
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break;
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default:
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rv = 0;
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break;
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}
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PHY_WRITE(sc, MII_ANAR, rv);
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PHY_WRITE(sc, MII_BMCR, ife->ifm_data);
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}
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break;
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case MII_TICK:
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/*
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* Is the interface even up?
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*/
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if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
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return (0);
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/*
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* Only used for autonegotiation.
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*/
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if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
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break;
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/*
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* The RealTek PHY's autonegotiation doesn't need to be
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* kicked; it continues in the background.
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*/
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break;
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case MII_DOWN:
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mii_phy_down(sc);
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return (0);
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}
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/* Update the media status. */
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mii_phy_status(sc);
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/* Callback if something changed. */
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mii_phy_update(sc, cmd);
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return (0);
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}
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void
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rlphy_status(struct mii_softc *sc)
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{
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struct rlphy_softc *rsc = (void *)sc;
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struct mii_data *mii = sc->mii_pdata;
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struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
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int bmsr, bmcr, anlpar;
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mii->mii_media_status = IFM_AVALID;
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mii->mii_media_active = IFM_ETHER;
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bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
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if (bmsr & BMSR_LINK)
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mii->mii_media_status |= IFM_ACTIVE;
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bmcr = PHY_READ(sc, MII_BMCR);
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if (bmcr & BMCR_ISO) {
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mii->mii_media_active |= IFM_NONE;
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mii->mii_media_status = 0;
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return;
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}
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if (bmcr & BMCR_LOOP)
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mii->mii_media_active |= IFM_LOOP;
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if (bmcr & BMCR_AUTOEN) {
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/*
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* NWay autonegotiation takes the highest-order common
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* bit of the ANAR and ANLPAR (i.e. best media advertised
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* both by us and our link partner).
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*/
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if ((bmsr & BMSR_ACOMP) == 0) {
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/* Erg, still trying, I guess... */
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mii->mii_media_active |= IFM_NONE;
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return;
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}
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if ((anlpar = PHY_READ(sc, MII_ANAR) &
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PHY_READ(sc, MII_ANLPAR))) {
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if (anlpar & ANLPAR_T4)
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mii->mii_media_active |= IFM_100_T4;
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else if (anlpar & ANLPAR_TX_FD)
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mii->mii_media_active |= IFM_100_TX|IFM_FDX;
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else if (anlpar & ANLPAR_TX)
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mii->mii_media_active |= IFM_100_TX;
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else if (anlpar & ANLPAR_10_FD)
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mii->mii_media_active |= IFM_10_T|IFM_FDX;
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else if (anlpar & ANLPAR_10)
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mii->mii_media_active |= IFM_10_T;
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else
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mii->mii_media_active |= IFM_NONE;
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return;
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}
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/*
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* If the other side doesn't support NWAY, then the
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* best we can do is determine if we have a 10Mbps or
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* 100Mbps link. There's no way to know if the link
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* is full or half duplex, so we default to half duplex
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* and hope that the user is clever enough to manually
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* change the media settings if we're wrong.
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*/
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/*
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* The RealTek PHY supports non-NWAY link speed
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* detection, however it does not report the link
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* detection results via the ANLPAR or BMSR registers.
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* (What? RealTek doesn't do things the way everyone
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* else does? I'm just shocked, shocked I tell you.)
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* To determine the link speed, we have to do one
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* of two things:
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*
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* - If this is a standalone RealTek RTL8201(L) PHY,
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* we can determine the link speed by testing bit 0
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* in the magic, vendor-specific register at offset
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* 0x19.
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*
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* - If this is a RealTek MAC with integrated PHY, we
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* can test the 'SPEED10' bit of the MAC's media status
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* register.
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*/
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if (rsc->sc_rtl8201l) {
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if (PHY_READ(sc, 0x0019) & 0x01)
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mii->mii_media_active |= IFM_100_TX;
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else
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mii->mii_media_active |= IFM_10_T;
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} else {
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if (PHY_READ(sc, RTK_MEDIASTAT) & RTK_MEDIASTAT_SPEED10)
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mii->mii_media_active |= IFM_10_T;
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else
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mii->mii_media_active |= IFM_100_TX;
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}
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} else
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mii->mii_media_active = ife->ifm_media;
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}
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static void
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rlphy_reset(struct mii_softc *sc)
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{
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mii_phy_reset(sc);
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/*
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* XXX RealTek PHY doesn't set the BMCR properly after
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* XXX reset, which breaks autonegotiation.
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*/
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PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN);
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}
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