319 lines
9.5 KiB
ArmAsm
319 lines
9.5 KiB
ArmAsm
/* $NetBSD: fpemu.S,v 1.6 2009/11/03 05:07:26 snj Exp $ */
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/* $OpenBSD: fpemu.S,v 1.4 2001/03/29 02:18:45 mickey Exp $ */
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/*
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* Copyright (c) 2000-2004 Michael Shalayeff
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <machine/asm.h>
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#include "assym.h"
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#define FPEMU_VERSION (1 << 11)
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#define FP_TABLE2(name, ep0, ep1, ep2, ep3) \
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ldil L%L$fpemu_tbl$name, %t1 ! \
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ldo R%L$fpemu_tbl$name(%t1), %t1 ! \
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ldwx,s %r1(%t1), %t2 ! \
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bv %r0(%t2) ! \
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nop ! \
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.label L$fpemu_tbl$name ! \
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.import __CONCAT(__CONCAT(ep0,_),name), code ! \
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.import __CONCAT(__CONCAT(ep1,_),name), code ! \
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.import __CONCAT(__CONCAT(ep2,_),name), code ! \
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.import __CONCAT(__CONCAT(ep3,_),name), code ! \
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.word __CONCAT(__CONCAT(ep0,_),name), __CONCAT(__CONCAT(ep1,_),name), __CONCAT(__CONCAT(ep2,_),name), __CONCAT(__CONCAT(ep3,_),name)
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#define FP_TABLE3(name,ep0,ep1,ep2,ep3,ep4,ep5,ep6,ep7,ep8,ep9,epa,epb,epc,epd,epe,epf) \
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ldil L%L$fpemu_tbl$name, %t1 ! \
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ldo R%L$fpemu_tbl$name(%t1), %t1 ! \
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ldwx,s %r1(%t1), %t2 ! \
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bv %r0(%t2) ! \
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nop ! \
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.label L$fpemu_tbl$name ! \
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.import __CONCAT(__CONCAT(ep0,_),name), code ! \
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.import __CONCAT(__CONCAT(ep1,_),name), code ! \
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.import __CONCAT(__CONCAT(ep2,_),name), code ! \
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.import __CONCAT(__CONCAT(ep3,_),name), code ! \
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.import __CONCAT(__CONCAT(ep4,_),name), code ! \
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.import __CONCAT(__CONCAT(ep5,_),name), code ! \
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.import __CONCAT(__CONCAT(ep6,_),name), code ! \
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.import __CONCAT(__CONCAT(ep7,_),name), code ! \
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.import __CONCAT(__CONCAT(ep8,_),name), code ! \
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.import __CONCAT(__CONCAT(ep9,_),name), code ! \
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.import __CONCAT(__CONCAT(epa,_),name), code ! \
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.import __CONCAT(__CONCAT(epb,_),name), code ! \
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.import __CONCAT(__CONCAT(epc,_),name), code ! \
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.import __CONCAT(__CONCAT(epd,_),name), code ! \
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.import __CONCAT(__CONCAT(epe,_),name), code ! \
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.import __CONCAT(__CONCAT(epf,_),name), code ! \
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.word __CONCAT(__CONCAT(ep0,_),name), __CONCAT(__CONCAT(ep1,_),name), __CONCAT(__CONCAT(ep2,_),name), __CONCAT(__CONCAT(ep3,_),name), __CONCAT(__CONCAT(ep4,_),name), __CONCAT(__CONCAT(ep5,_),name), __CONCAT(__CONCAT(ep6,_),name), __CONCAT(__CONCAT(ep7,_),name), __CONCAT(__CONCAT(ep8,_),name), __CONCAT(__CONCAT(ep9,_),name), __CONCAT(__CONCAT(epa,_),name), __CONCAT(__CONCAT(epb,_),name), __CONCAT(__CONCAT(epc,_),name), __CONCAT(__CONCAT(epd,_),name), __CONCAT(__CONCAT(epe,_),name), __CONCAT(__CONCAT(epf,_),name)
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.section .bss
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.export L$fpemu_stack, data
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L$fpemu_stack:
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.comm NBPG
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.text
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/*
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* fpu_emulate(iir)
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*/
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LEAF_ENTRY_NOPROFILE(fpu_emulate)
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extru %arg0, 22, 2, %arg3
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extru %arg0, 18, 3, %r31
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comib,= 1, %arg3, L$fpu_cln1
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nop
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extru %arg0, 16, 2, %r31
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L$fpu_cln1:
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/*
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* theoreticaly we would need to determine the fpu instruction
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* exception type (there could be 4 of those, but stick w/
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* non-timex fpus for now.
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*/
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ldi 1, %ret0
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extru,<> %arg0, 10, 5, %r1
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ldi 32, %r1 /* fpemu zero reg */
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extru,<> %arg0, 31, 5, %t1
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b,n L$fpemu_nzt
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comib,=,n 2, %arg3, L$fpemu_exit
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L$fpemu_nzt:
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copy %arg0, %t4
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sh3add %r1, %arg2, %arg0
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extru %arg1, 20, 2, %r1
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sh3add %t1, %arg2, %arg1
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/*
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* arg0 -- source register (address)
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* arg1 -- target register (address)
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* arg2 -- fpregs context
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* arg3 -- class
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* r31 -- subop
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* r1 -- format specifier
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* (t4 -- copy or arg0, ie iir)
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*/
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comib,=,n 0, %arg3, L$fpemu0c_0
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comib,=,n 1, %arg3, L$fpemu0c_1
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comib,=,n 2, %arg3, L$fpemu0c_2
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comib,=,n 3, %arg3, L$fpemu0c_3
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L$fpemu0c_0:
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comib,=,n 0, %r31, L$fpemu0c_0_0
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comib,=,n 1, %r31, L$fpemu_exit
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comib,=,n 2, %r31, L$fpemu0c_0_2
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comib,=,n 3, %r31, L$fpemu0c_0_3
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comib,=,n 4, %r31, L$fpemu0c_0_4
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comib,=,n 5, %r31, L$fpemu0c_0_5
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comib,=,n 6, %r31, L$fpemu_exit
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comib,=,n 7, %r31, L$fpemu_exit
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L$fpemu0c_0_0:
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ldi FPEMU_VERSION, %t4
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stw %t4, 0(%arg2)
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bv 0(%rp)
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copy %r0, %ret0
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L$fpemu0c_0_2: /* fcpy */
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comib,=,n 2, %r1, L$fpemu_exit
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subi 3, %r1, %r1
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ldw 0*4(%arg0), %t1
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ldw 1*4(%arg0), %t2
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ldw 2*4(%arg0), %t3
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ldw 3*4(%arg0), %t4
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blr,n %r1, %r0
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nop
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stw %t3, 2*4(%arg1)
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stw %t4, 3*4(%arg1)
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stw %t2, 1*4(%arg1)
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nop
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nop
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nop
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stw %t1, 0*4(%arg1)
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bv 0(%rp)
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copy %r0, %ret0
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L$fpemu0c_0_3: /* fabs */
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comib,=,n 2, %r1, L$fpemu_exit
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subi 3, %r1, %r1
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ldw 0*4(%arg0), %t1
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ldw 1*4(%arg0), %t2
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ldw 2*4(%arg0), %t3
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ldw 3*4(%arg0), %t4
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depi 0, 0, 1, %t1
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blr,n %r1, %r0
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nop
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stw %t3, 2*4(%arg1)
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stw %t4, 3*4(%arg1)
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stw %t2, 1*4(%arg1)
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nop
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nop
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nop
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stw %t1, 0*4(%arg1)
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bv 0(%rp)
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copy %r0, %ret0
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L$fpemu0c_0_4: /* fsqrt */
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/* quad not implemented */
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FP_TABLE2(fsqrt,sgl,dbl,invalid,invalid)
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L$fpemu0c_0_5: /* frnd */
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/* quad not implemented */
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FP_TABLE2(frnd,sgl,dbl,invalid,quad)
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L$fpemu0c_1:
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extru %t4, 18, 2, %t2
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sh2add %r1, %t2, %r1
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comib,=,n 0, %r31, L$fpemu0c_1_0
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comib,=,n 1, %r31, L$fpemu0c_1_1
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comib,=,n 2, %r31, L$fpemu0c_1_2
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comib,=,n 3, %r31, L$fpemu0c_1_3
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L$fpemu0c_1_0: /* fcnvff */
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#define sgl_to_quad_fcnvff invalid_fcnvff
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#define dbl_to_quad_fcnvff invalid_fcnvff
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#define quad_to_sgl_fcnvff invalid_fcnvff
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#define quad_to_dbl_fcnvff invalid_fcnvff
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FP_TABLE3(fcnvff, invalid, sgl_to_dbl, invalid, sgl_to_quad, dbl_to_sgl, invalid, invalid, dbl_to_quad, invalid, invalid, invalid, invalid, quad_to_sgl, quad_to_dbl, invalid, invalid)
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L$fpemu0c_1_1: /* fcnvxf */
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#define sgl_to_quad_fcnvxf invalid_fcnvxf
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#define dbl_to_quad_fcnvxf invalid_fcnvxf
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#define quad_to_sgl_fcnvxf invalid_fcnvxf
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#define quad_to_dbl_fcnvxf invalid_fcnvxf
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#define quad_to_quad_fcnvxf invalid_fcnvxf
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FP_TABLE3(fcnvxf, sgl_to_sgl, sgl_to_dbl, invalid, sgl_to_quad, dbl_to_sgl, dbl_to_dbl, invalid, dbl_to_quad, invalid, invalid, invalid, invalid, quad_to_sgl, quad_to_dbl, invalid, quad_to_quad)
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L$fpemu0c_1_2: /* fcnvfx */
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#define sgl_to_quad_fcnvfx invalid_fcnvfx
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#define dbl_to_quad_fcnvfx invalid_fcnvfx
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#define quad_to_sgl_fcnvfx invalid_fcnvfx
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#define quad_to_dbl_fcnvfx invalid_fcnvfx
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#define quad_to_quad_fcnvfx invalid_fcnvfx
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FP_TABLE3(fcnvfx, sgl_to_sgl, sgl_to_dbl, invalid, sgl_to_quad, dbl_to_sgl, dbl_to_dbl, invalid, dbl_to_quad, invalid, invalid, invalid, invalid, quad_to_sgl, quad_to_dbl, invalid, quad_to_quad)
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L$fpemu0c_1_3: /* fcnvfxt */
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#define sgl_to_quad_fcnvfxt invalid_fcnvfxt
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#define dbl_to_quad_fcnvfxt invalid_fcnvfxt
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#define quad_to_sgl_fcnvfxt invalid_fcnvfxt
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#define quad_to_dbl_fcnvfxt invalid_fcnvfxt
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#define quad_to_quad_fcnvfxt invalid_fcnvfxt
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FP_TABLE3(fcnvfxt, sgl_to_sgl, sgl_to_dbl, invalid, sgl_to_quad, dbl_to_sgl, dbl_to_dbl, invalid, dbl_to_quad, invalid, invalid, invalid, invalid, quad_to_sgl, quad_to_dbl, invalid, quad_to_quad)
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L$fpemu0c_2:
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comib,=,n 0, %r31, L$fpemu0c_2_0
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comib,=,n 1, %r31, L$fpemu0c_2_1
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comib,=,n 2, %r31, L$fpemu_exit
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comib,=,n 3, %r31, L$fpemu_exit
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comib,=,n 4, %r31, L$fpemu_exit
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comib,=,n 5, %r31, L$fpemu_exit
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comib,=,n 6, %r31, L$fpemu_exit
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comib,=,n 7, %r31, L$fpemu_exit
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L$fpemu0c_2_0:
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copy %arg2, %arg3
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extru,<> %t4, 15, 5, %t1
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ldi 32, %t1
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sh3add %t1, %arg3, %arg1
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extru %t4, 31, 5, %arg2
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FP_TABLE2(fcmp,sgl,dbl,invalid,invalid)
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L$fpemu0c_2_1:
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comib,<>,n 0, %r1, L$fpemu_exit
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/* extru %t4, 31, 5, %arg1 */
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/* XXX timex is much more compilicated */
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ldw 0(%arg2), %t1
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ldi 0, %ret0
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extru,<> %t1, 5, 1, %r0
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bv,n %r0(%rp)
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/* advance the pcqueue */
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mtctl %r0, %pcsq
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mfctl %pcsq, %t2
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mtctl %t2, %pcsq
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mtctl %t2, %pcsq
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mtctl %r0, %pcoq
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mfctl %pcoq, %t2
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mtctl %t2, %pcoq
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ldo 4(%t2), %t2
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bv %r0(%rp)
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mtctl %t2, %pcoq
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L$fpemu0c_3:
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copy %arg2, %arg3
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extru,<> %t4, 31, 5, %t1
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ldi 32, %t1
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sh3add %t1, %arg3, %arg2
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comib,=,n 0, %r31, L$fpemu0c_3_0
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comib,=,n 1, %r31, L$fpemu0c_3_1
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comib,=,n 2, %r31, L$fpemu0c_3_2
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comib,=,n 3, %r31, L$fpemu0c_3_3
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comib,=,n 4, %r31, L$fpemu0c_3_4
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comib,=,n 5, %r31, L$fpemu_exit
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comib,=,n 6, %r31, L$fpemu_exit
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comib,=,n 7, %r31, L$fpemu_exit
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L$fpemu0c_3_0: /* fadd */
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FP_TABLE2(fadd,sgl,dbl,invalid,invalid)
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L$fpemu0c_3_1: /* fsub */
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FP_TABLE2(fsub,sgl,dbl,invalid,invalid)
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L$fpemu0c_3_2: /* fmpy */
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FP_TABLE2(fmpy,sgl,dbl,invalid,invalid)
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L$fpemu0c_3_3: /* fdiv */
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FP_TABLE2(fdiv,sgl,dbl,invalid,invalid)
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L$fpemu0c_3_4: /* frem */
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FP_TABLE2(frem,sgl,dbl,invalid,invalid)
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.export L$fpemu_exit, code
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L$fpemu_exit:
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/* these look very ugly, but we don't want to mess up w/ m4 just
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* for the sake of overall world prettieness value growth XXX */
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invalid_fsqrt:
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invalid_frnd:
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invalid_fcnvff:
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invalid_fcnvxf:
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invalid_fcnvfx:
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invalid_fcnvfxt:
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invalid_fcmp:
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invalid_fadd:
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invalid_fsub:
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invalid_fmpy:
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invalid_fdiv:
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invalid_frem:
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bv,n 0(%rp)
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EXIT(fpu_emulate)
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.end
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