108 lines
3.1 KiB
C
108 lines
3.1 KiB
C
/* $NetBSD: db_machdep.h,v 1.12 1994/10/26 07:50:44 cgd Exp $ */
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/*
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* Mach Operating System
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* Copyright (c) 1992 Carnegie Mellon University
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* All Rights Reserved.
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*
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* Permission to use, copy, modify and distribute this software and its
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* documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
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* ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie Mellon
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* the rights to redistribute these changes.
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*/
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/*
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* Machine-dependent defines for new kernel debugger.
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*/
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#ifndef _M68K_DB_MACHDEP_H_
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#define _M68K_DB_MACHDEP_H_
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#include <vm/vm_prot.h>
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#include <vm/vm_param.h>
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#include <vm/vm_inherit.h>
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#include <vm/lock.h>
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#include <machine/psl.h>
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#include <machine/trap.h>
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typedef vm_offset_t db_addr_t; /* address - unsigned */
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typedef int db_expr_t; /* expression - signed */
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struct mc68020_saved_state {
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int d0; /* data registers */
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int d1;
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int d2;
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int d3;
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int d4;
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int d5;
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int d6;
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int d7;
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int a0; /* address registers */
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int a1;
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int a2;
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int a3;
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int a4;
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int a5;
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int a6;
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int sp; /* stack pointer */
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short empty;
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short stackadj;
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unsigned short sr; /* status register */
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unsigned int pc; /* program counter - UNALIGNED!!! */
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unsigned short stkfmt : 4; /* rte stack frame format */
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unsigned short vector : 12; /* vector number */
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};
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typedef struct mc68020_saved_state db_regs_t;
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db_regs_t ddb_regs; /* register state */
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#define DDB_REGS (&ddb_regs)
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#define PC_REGS(regs) ((db_addr_t)(regs)->pc)
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#define BKPT_INST 0x4e4f /* breakpoint instruction */
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#define BKPT_SIZE (2) /* size of breakpoint inst */
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#define BKPT_SET(inst) (BKPT_INST)
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#define FIXUP_PC_AFTER_BREAK ddb_regs.pc -= 2;
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#define SR_T1 0x8000
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#define db_clear_single_step(regs) ((regs)->sr &= ~SR_T1)
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#define db_set_single_step(regs) ((regs)->sr |= SR_T1)
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#define IS_BREAKPOINT_TRAP(type, code) ((type) == T_BREAKPOINT)
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#ifdef T_WATCHPOINT
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#define IS_WATCHPOINT_TRAP(type, code) ((type) == T_WATCHPOINT)
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#else
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#define IS_WATCHPOINT_TRAP(type, code) 0
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#endif
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#define M_RTS 0xffff0000
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#define I_RTS 0x4e750000
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#define M_JSR 0xffc00000
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#define I_JSR 0x4e800000
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#define M_BSR 0xff000000
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#define I_BSR 0x61000000
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#define M_RTE 0xffff0000
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#define I_RTE 0x4e730000
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#define inst_trap_return(ins) (((ins)&M_RTE) == I_RTE)
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#define inst_return(ins) (((ins)&M_RTS) == I_RTS)
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#define inst_call(ins) (((ins)&M_JSR) == I_JSR || \
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((ins)&M_BSR) == I_BSR)
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#define inst_load(ins) 0
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#define inst_store(ins) 0
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#endif /* _M68K_DB_MACHDEP_H_ */
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