5f1c4bb519
registers. rationale: - Netwave cards choke if we map i/o memory to >= 0x400 - even though, CIS tuple talks nothing about it - it is not possible to specify range in pcmcia_io_map - it would be very bad to do a try-and-error bus_space allocation for i/o memory regions < 0x400 - we can have exactly the same functionality with memory mapped access this should correct PR 10139. the memory mapped access idea was from WIDE wildboar/bsdi cnw code.
147 lines
5.4 KiB
C
147 lines
5.4 KiB
C
/* $NetBSD: if_cnwreg.h,v 1.3 2000/07/05 18:42:19 itojun Exp $ */
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Michael Eriksson.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/* I/O area */
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#define CNW_IO_SIZE 0x10
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/* I/O area can be accessed via mapped memory too */
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#define CNW_IOM_ADDR 0x28000
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#define CNW_IOM_SIZE CNW_IO_SIZE
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#define CNW_IOM_OFF (CNW_IOM_ADDR - CNW_MEM_ADDR)
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/* I/O registers */
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#define CNW_REG_COR 0x0
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# define CNW_COR_IENA 0x01 /* Interrupt enable */
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# define CNW_COR_LVLREQ 0x40 /* Keep high */
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#define CNW_REG_CCSR 0x2
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#define CNW_REG_ASR 0x4
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# define CNW_ASR_TXBA 0x01 /* Trasmit buffer available */
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# define CNW_ASR_WOC 0x08 /* Write Operation Complete */
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# define CNW_ASR_TXDN 0x20 /* Transmit done */
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# define CNW_ASR_RXERR 0x40 /* Receive error */
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# define CNW_ASR_RXRDY 0x80 /* Packet received */
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#define CNW_REG_IOLOW 0x6
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#define CNW_REG_IOHI 0x7
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#define CNW_REG_IOCONTROL 0x8
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#define CNW_REG_IMR 0xa
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# define CNW_IMR_IENA 0x02 /* Interrupt enable */
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# define CNW_IMR_RFU1 0x10 /* RFU intr mask, keep high */
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#define CNW_REG_PMR 0xc
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# define CNW_PMR_RESET 0x80
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#define CNW_REG_DATA 0xf
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/* Mapped memory */
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#define CNW_MEM_ADDR 0x20000
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#define CNW_MEM_SIZE 0x8000
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/* Extended I/O registers (memory mapped) */
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#define CNW_EREG_CB 0x100
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#define CNW_EREG_ASCC 0x114
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#define CNW_EREG_RSER 0x120
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# define CNW_RSER_RXBIG 0x02
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# define CNW_RSER_RXCRC 0x04
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# define CNW_RSER_RXOVERRUN 0x08
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# define CNW_RSER_RXOVERFLOW 0x10
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# define CNW_RSER_RXERR 0x40
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# define CNW_RSER_RXAVAIL 0x80
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#define CNW_EREG_RSERW 0x124
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#define CNW_EREG_TSER 0x130
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# define CNW_TSER_RTRY 0x0f
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# define CNW_TSER_TXERR 0x10
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# define CNW_TSER_TXOK 0x20
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# define CNW_TSER_TXNOAP 0x40
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# define CNW_TSER_TXGU 0x80
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# define CNW_TSER_ERROR (CNW_TSER_TXERR | CNW_TSER_TXNOAP | \
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CNW_TSER_TXGU)
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#define CNW_EREG_TSERW 0x134
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#define CNW_EREG_TDP 0x140
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#define CNW_EREG_LIF 0x14e
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#define CNW_EREG_RDP 0x150
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#define CNW_EREG_SPCQ 0x154
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#define CNW_EREG_SPU 0x155
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#define CNW_EREG_ISPLQ 0x156
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#define CNW_EREG_HHC 0x158
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#define CNW_EREG_PA 0x160
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#define CNW_EREG_ARW 0x166
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#define CNW_EREG_MHS 0x16b
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#define CNW_EREG_NI 0x16e
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#define CNW_EREG_CRBP 0x17a
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#define CNW_EREG_EC 0x180
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#define CNW_EREG_STAT_RXERR 0x184
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#define CNW_EREG_STAT_FRAME 0x186
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#define CNW_EREG_STAT_IBEAT 0x188
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#define CNW_EREG_STAT_RXBUF 0x18e
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#define CNW_EREG_STAT_RXMULTI 0x190
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#define CNW_EREG_STAT_TXRETRY 0x192
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#define CNW_EREG_STAT_TXABORT 0x194
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#define CNW_EREG_STAT_OBEAT 0x198
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#define CNW_EREG_STAT_TXOK 0x19a
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#define CNW_EREG_STAT_TXSENT 0x19c
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/*
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* Commands used in the extended command buffer
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* CNW_EREG_CB (0x100-0x10f)
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*/
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#define CNW_CMD_NOP 0x00
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#define CNW_CMD_SRC 0x01
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# define CNW_RXCONF_RXENA 0x80 /* Receive Enable */
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# define CNW_RXCONF_MAC 0x20 /* MAC host receive mode */
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# define CNW_RXCONF_PRO 0x10 /* Promiscuous */
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# define CNW_RXCONF_AMP 0x08 /* Accept Multicast Packets */
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# define CNW_RXCONF_BCAST 0x04 /* Accept Broadcast Packets */
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#define CNW_CMD_STC 0x02
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# define CNW_TXCONF_TXENA 0x80 /* Transmit Enable */
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# define CNW_TXCONF_MAC 0x20 /* Host sends MAC mode */
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# define CNW_TXCONF_EUD 0x10 /* Enable Uni-Data packets */
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# define CNW_TXCONF_KEY 0x02 /* Scramble data packets */
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# define CNW_TXCONF_LOOP 0x01 /* Loopback mode */
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#define CNW_CMD_AMA 0x03
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#define CNW_CMD_DMA 0x04
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#define CNW_CMD_SAMA 0x05
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#define CNW_CMD_ER 0x06
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#define CNW_CMD_DR 0x07
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#define CNW_CMD_TL 0x08
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#define CNW_CMD_SRP 0x09
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#define CNW_CMD_SSK 0x0a
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#define CNW_CMD_SMD 0x0b
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#define CNW_CMD_SAPD 0x0c
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#define CNW_CMD_SSS 0x11
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#define CNW_CMD_EOC 0x00 /* End-of-command marker */
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