211 lines
6.2 KiB
C
211 lines
6.2 KiB
C
/* $NetBSD: com_aubus.c,v 1.6 2011/07/01 18:39:29 dyoung Exp $ */
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/*
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* Copyright 2001 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: com_aubus.c,v 1.6 2011/07/01 18:39:29 dyoung Exp $");
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#include <sys/param.h>
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#include <sys/device.h>
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#include <sys/lwp.h>
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#include <sys/systm.h>
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#include <sys/tty.h>
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#include <sys/bus.h>
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#include <dev/ic/comvar.h>
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#include <mips/alchemy/include/aureg.h>
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#include <mips/alchemy/include/auvar.h>
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#include <mips/alchemy/include/aubusvar.h>
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#include <mips/alchemy/dev/com_aubus_reg.h>
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struct com_aubus_softc {
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struct com_softc sc_com;
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int sc_irq;
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void *sc_ih;
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};
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static int com_aubus_probe(device_t, cfdata_t , void *);
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static void com_aubus_attach(device_t, device_t, void *);
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static int com_aubus_enable(struct com_softc *);
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static void com_aubus_disable(struct com_softc *);
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static void com_aubus_initmap(struct com_regs *);
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CFATTACH_DECL_NEW(com_aubus, sizeof(struct com_aubus_softc),
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com_aubus_probe, com_aubus_attach, NULL, NULL);
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#define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
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#ifndef COM_REGMAP
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#error COM_REGMAP not defined!
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#endif
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int
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com_aubus_probe(device_t parent, cfdata_t cf, void *aux)
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{
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struct aubus_attach_args *aa = aux;
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/* match only aucom devices */
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if (strcmp(aa->aa_name, cf->cf_name) == 0)
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return (1);
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return (0);
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}
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void
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com_aubus_attach(device_t parent, device_t self, void *aux)
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{
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struct com_aubus_softc *asc = device_private(self);
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struct com_softc *sc = &asc->sc_com;
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struct aubus_attach_args *aa = aux;
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int addr = aa->aa_addr;
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sc->sc_dev = self;
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sc->sc_regs.cr_iot = aa->aa_st;
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sc->sc_regs.cr_iobase = addr;
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asc->sc_irq = aa->aa_irq[0];
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if (com_is_console(aa->aa_st, addr, &sc->sc_regs.cr_ioh) == 0 &&
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bus_space_map(aa->aa_st, addr, AUCOM_NPORTS, 0,
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&sc->sc_regs.cr_ioh) != 0) {
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aprint_error(": can't map i/o space\n");
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return;
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}
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com_aubus_initmap(&sc->sc_regs);
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/*
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* The input to the clock divider is the internal pbus clock (1/4 the
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* processor frequency). The actual baud rate of the interface will
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* be pbus_freq / CLKDIV.
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*/
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sc->sc_frequency = curcpu()->ci_cpu_freq / 4;
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sc->sc_hwflags = COM_HW_NO_TXPRELOAD;
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sc->sc_type = COM_TYPE_AU1x00;
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sc->enable = com_aubus_enable;
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sc->disable = com_aubus_disable;
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/* Enable UART so we can access it. */
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com_aubus_enable(sc);
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sc->enabled = 1;
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/* Attach MI com driver. */
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com_attach_subr(sc);
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/* Disable UART if it's not the console. (XXX kgdb?) */
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if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
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com_aubus_disable(sc);
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sc->enabled = 0;
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}
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}
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int
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com_aubus_enable(struct com_softc *sc)
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{
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struct com_aubus_softc *asc = (void *)sc; /* XXX mi prototype */
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/* Ignore requests to enable an already enabled console. */
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if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE) && (asc->sc_ih != NULL))
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return (0);
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/* Enable the UART module. */
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bus_space_write_1(sc->sc_regs.cr_iot, sc->sc_regs.cr_ioh, AUCOM_MODCTL,
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UMC_ME | UMC_CE);
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/* Establish the interrupt. */
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asc->sc_ih = au_intr_establish(asc->sc_irq, 0, IPL_SERIAL, IST_LEVEL,
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comintr, sc);
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if (asc->sc_ih == NULL) {
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aprint_error_dev(sc->sc_dev,
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"unable to establish interrupt\n");
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return (1);
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}
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return (0);
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}
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void
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com_aubus_disable(struct com_softc *sc)
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{
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struct com_aubus_softc *asc = (void *)sc; /* XXX mi prototype */
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/* Ignore requests to disable the console. */
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if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE))
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return;
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/* Disestablish the interrupt. */
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au_intr_disestablish(asc->sc_ih);
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/* Disable the UART module. */
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bus_space_write_1(sc->sc_regs.cr_iot, sc->sc_regs.cr_ioh,
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AUCOM_MODCTL, 0);
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}
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void
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com_aubus_initmap(struct com_regs *regsp)
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{
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regsp->cr_nports = AUCOM_NPORTS;
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regsp->cr_map[COM_REG_RXDATA] = AUCOM_RXDATA;
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regsp->cr_map[COM_REG_TXDATA] = AUCOM_TXDATA;
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regsp->cr_map[COM_REG_DLBL] = AUCOM_DLB;
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regsp->cr_map[COM_REG_DLBH] = AUCOM_DLB;
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regsp->cr_map[COM_REG_IER] = AUCOM_IER;
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regsp->cr_map[COM_REG_IIR] = AUCOM_IIR;
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regsp->cr_map[COM_REG_FIFO] = AUCOM_FIFO;
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regsp->cr_map[COM_REG_EFR] = 0;
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regsp->cr_map[COM_REG_LCR] = AUCOM_LCTL;
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regsp->cr_map[COM_REG_MCR] = AUCOM_MCR;
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regsp->cr_map[COM_REG_LSR] = AUCOM_LSR;
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regsp->cr_map[COM_REG_MSR] = AUCOM_MSR;
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}
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int
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com_aubus_cnattach(bus_addr_t addr, int baud)
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{
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struct com_regs regs;
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uint32_t sysfreq;
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regs.cr_iot = aubus_st;
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regs.cr_iobase = addr;
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regs.cr_nports = AUCOM_NPORTS;
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com_aubus_initmap(®s);
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sysfreq = curcpu()->ci_cpu_freq / 4;
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return comcnattach1(®s, baud, sysfreq, COM_TYPE_AU1x00, CONMODE);
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}
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