NetBSD/sys/arch/mips/alchemy/dev/aupcmciareg.h
gdamore 6dd67e3239 Initial commit of aupcmcia chip driver. It requires board specific logic
(coming in a the follow up commit for dbau1550 only), and is not yet complete.
It has serious problems, enough that it isn't yet usable, although the
functionality is all basically fleshed out.  It is not enabled in any
default kernels at this point, so it should be benign.  Hopefully the
bugs will soon be worked out and these caveats can be removed.
2006-02-23 03:49:28 +00:00

47 lines
2.0 KiB
C

/* $NetBSD: aupcmciareg.h,v 1.1 2006/02/23 03:49:28 gdamore Exp $ */
/*-
* Copyright (c) 2006 Itronix Inc.
* All rights reserved.
*
* Written by Garrett D'Amore for Itronix Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of Itronix Inc. may not be used to endorse
* or promote products derived from this software without specific
* prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _MIPS_ALCHEMY_DEV_AUPCMCIAREG_H
#define _MIPS_ALCHEMY_DEV_AUPCMCIAREG_H
/*
* PCMCIA address ranges. The Alchemy provides 64 MB mappings for
* each of the three ranges. Of particlar, please note that
* AUCMCIA_IO_START begins at offset zero.
*/
#define AUPCMCIA_IO_OFFSET 0x00000000
#define AUPCMCIA_ATTR_OFFSET 0x40000000
#define AUPCMCIA_MEM_OFFSET 0x80000000
#endif /* _MIPS_ALCHEMY_DEV_AUPCMCIAREG_H */