NetBSD/sys/arch/arc/TODO

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$NetBSD: TODO,v 1.17 2003/04/06 17:48:51 tsutsui Exp $
To do list (in some particular order)
XXX some entries might be obsolete.
o Boot. Standalone boot program to load ELF kernels instead of
booting ECOFF kernels directly.
(maybe sgimips/stand would help, but annoying buggy ARC BIOS)
o sysinst
maybe MD fdisk partitioning support is required to load files
from FAT partition on ARC BIOS prompt.
o install notes
o use MI driver
- use MI ncr53c9x driver instead of home grown asc
XXX patch is available. needs testers
- make fd driver MI, and share it with other ports
(contact christos about MI fd driver)
- use MI bha driver instead of home grown btl
XXX needs fixes of DESKstation support
o VXL framebuffer support (Magnum, RISCstation 2200)
o com_jazzio.c
- clock handling clean up (obtain from ARC BIOS)
- fifo disabling may be only needed on some Magnum?
o remove pccons and switch to wscons completely
(XXX what's the problem to remove pccons?)
o AD1848 audio support
o missing MI devices
ses?, vcoda, ...
o Xserver
- VXL Magnum, RISCstation 2200
- vga/S3 PICA, Image RISCstation - OpenBSD's?
- vga/cirrus RISCserver 2200, Express5800/240 R4400 EISA
- vga/??? DESKstation Tyne, rPC44
- TGA RISCstation 2250, Express5800/230 R4400 PCI
o Find out why bitmap load to S3-928 flashes screen. (X server)
Know why (enable linear mode). Need S3 info.
o repair DESKstation support
- requires bounce buffer bus_dma for Tyne
XXX - too small bounce buffer size (128KB)
o Olivetti M700 support
o NEC Express5800/230 R10000 PCI (NEC-JC95) support
(needs MI R10000 support)
o SNI RM200PCI/RM300/RM400/RM600 support
o parse ARC BIOS configuration information and use it
o increase MAXPHYS to 64KB
(XXX why is it limited to 32KB?)
o fix kernel start address
(maybe requires bootloader support)
o allocate PICA_TL_BASE dynamically
o remove inb/outb
o remove UADDR
o fix mem_clusters[] usage.
o intrcnt[] name cleanup, use MI evcnt(9)
o test and merge soren's clean up about proc0.p_addr.
o redesign interrupt handler framework.
i/o bus devices should have sane IPL, but currently doesn't.
also, current MIPS interrupt handler has overblocking and
other problems as follows:
- SR_INT_IE should be enabled before calling hardclock().
Since this is not done currently, spllowersoftclock()
on hardclock() doesn't have effect, and softclock() is
handled with all interrupt disabled in this case.
-> overblocking, possibly causes missing hardclock()
- MIPS3_CLKF_BASEPRI() doesn't work correctly,
when MIPS_INT_MASK_5 (== MIPS_INT_MASK_CLOCK) is disabled.
-> micro optimization on hardclock() doesn't work.
but currently this may make hardclock() latency better
due to above SR_INT_IE problem.
s/MIPS_INT_MASK/MIPS3_INT_MASK/ makes this work, although tricky.
- if (ipending & INT_MASK_REAL_DEV) == 0,
softnet() and softclock() are handled with all interrupt disabled.
-> overblocking, possibly causes missing hardclock()
- softclock() is handled with softnet() disabled.
-> slightly overblocking
- `netisr' handling in netintr() implies potential race condition.
The access to `netisr' should be protected by splnet().
Currently this is not real problem due to above overblocking.
`ssir' handling on many mips ports has same problem.
It should be protected by splnet() or splserial() or splhigh()
(depends on the highest interrupt level which sets `ssir').
Since `ssir' is accessed not only by setsoftnet() but also
by setsoft(), setsoftnet() should protect `ssir' by splserial()
or something. (i.e. priority level which setsoft() will be called)
Probably, it is better to split `ssir' variable for each
priority level.
Also, _clearsoftintr() should be called before `ssir' access.
currently this is not real problem due to above overblocking.
- INT_MASK_REAL_DEV should be removed
- make CLKF_INTR() work.
- generic software interrupt
(see algor, mipsco, pmax etc.)
- major rework, possibly by software emulated spl.
splserial()/splsoftserial()
o it is better to always disable MIPS_INT_MASK_CLOCK.
those are the points which should be fixed:
mips_idle: li t0, (MIPS_INT_MASK | MIPS_SR_INT_IE)
machdep.c: curpcb->pcb_context[11] = MIPS_INT_MASK | MIPS_SR_INT_IE;
spl0()
splnone()
- MIPS_INT_MASK_CLOCK should be removed in someway
o XXX at least 2000/06/07 version is already quite unstable
on PICA and NEC Image RISCstation. (but almost OK on Magnum)
Userland commands dumps core randomly.
This version is before _MIPS_PADDR_T_64BIT changes
and MIPS3_TLB_WIRED_UPAGES changes.
"vm_page_zero_enable = FALSE" makes this problem disappeared.
(vm_page_zero_enable = FALSE by default on all archs w/ UBC, now)
currently, page zero in the idle loop is also disabled on
untested platforms like DESKstation rPC44/Tyne and SNI for safety.
XXX what's the current status of uvm_pageidlezero()?
o resolve "XXX"
(following entries might be MI MIPS items)
o Move the RO and WIRED attribute from the pte to the pv table.
This saves four instructions in the tlb miss handler.
o Can we have 32 double registers?
o 64bit kernel/userland
o fix implementation of DELAY(), clean up clock implementation
o omit __SWAP_BROKEN in <mips/types.h>
o clean up ALEAF/NLEAF/NON_LEAF/NNON_LEAF in userland.
Lots of other things.....