110 lines
3.9 KiB
C
110 lines
3.9 KiB
C
/* $NetBSD: pte.h,v 1.2 1995/03/28 18:14:04 jtc Exp $ */
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/*
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* Copyright (c) 1994, 1995 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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/*
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* Alpha page table entry.
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* Things which are in the VMS PALcode but not in the OSF PALcode
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* are marked with "(VMS)".
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*
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* This information derived from pp. (II) 3-3 - (II) 3-6 and
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* (III) 3-3 - (III) 3-5 of the "Alpha Architecture Reference Manual" by
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* Richard L. Sites.
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*/
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/*
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* Alpha Page Table Entry
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*/
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typedef u_int64_t pt_entry_t;
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#define PT_ENTRY_NULL ((pt_entry_t *) 0)
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#define PTESHIFT 3 /* pte size == 1 << PTESHIFT */
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#define PG_V 0x0000000000000001 /* PFN Valid */
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#define PG_NV 0x0000000000000000 /* PFN NOT Valid */
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#define PG_FOR 0x0000000000000002 /* Fault on read */
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#define PG_FOW 0x0000000000000004 /* Fault on write */
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#define PG_FOE 0x0000000000000008 /* Fault on execute */
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#define PG_ASM 0x0000000000000010 /* Address space match */
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#define PG_GH 0x0000000000000060 /* Granularity hint */
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#define PG_KRE 0x0000000000000100 /* Kernel read enable */
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#define PG_URE 0x0000000000000200 /* User read enable */
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#define PG_KWE 0x0000000000001000 /* Kernel write enable */
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#define PG_UWE 0x0000000000002000 /* User write enable */
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#define PG_PROT 0x000000000000ff00
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#define PG_RSVD 0x000000000000cc80 /* Reserved fpr hardware */
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#define PG_WIRED 0x0000000000010000 /* Wired. [SOFTWARE] */
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#define PG_MOD 0x0000000000020000 /* Modified. [SOFTWARE] */
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#define PG_USED 0x0000000000040000 /* Referenced. [SOFTWARE] */
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#define PG_FRAME 0xffffffff00000000
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#define PG_SHIFT 32
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#define PG_PFNUM(x) (((x) & PG_FRAME) >> PG_SHIFT)
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#if defined(_KERNEL) && !defined(LOCORE)
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#define K0SEG_BEGIN 0xfffffc0000000000 /* unmapped, cached */
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#define K0SEG_END 0xfffffe0000000000
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#define PHYS_UNCACHED 0x0000000040000000
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#define k0segtophys(x) ((vm_offset_t)(x) & 0x00000003ffffffff)
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#define phystok0seg(x) ((vm_offset_t)(x) | K0SEG_BEGIN)
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#define phystouncached(x) ((vm_offset_t)(x) | PHYS_UNCACHED)
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#define uncachedtophys(x) ((vm_offset_t)(x) & ~PHYS_UNCACHED)
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#define PTEMASK (NPTEPG - 1)
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#define vatopte(va) (((va) >> PGSHIFT) & PTEMASK)
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#define vatoste(va) (((va) >> SEGSHIFT) & PTEMASK)
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#define vatopa(va) \
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((PG_PFNUM(*kvtopte(va)) << PGSHIFT) | ((vm_offset_t)(va) & PGOFSET))
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#define ALPHA_STSIZE NBPG /* 8k */
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#define ALPHA_MAX_PTSIZE (NPTEPG * NBPG) /* 8M */
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/*
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* Kernel virtual address to Sysmap entry and visa versa.
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*/
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#define kvtopte(va) \
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(Sysmap + (((vm_offset_t)(va) - VM_MIN_KERNEL_ADDRESS) >> PGSHIFT))
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#define ptetokv(pte) \
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((((pt_entry_t *)(pte) - Sysmap) << PGSHIFT) + VM_MIN_KERNEL_ADDRESS)
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/*
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* Kernel virtual address to Lev1map entry index.
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*/
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#define kvtol1pte(va) \
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(((vm_offset_t)(va) >> (PGSHIFT + 2*(PGSHIFT-PTESHIFT))) & PTEMASK)
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#define loadustp(stpte) { \
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Lev1map[kvtol1pte(VM_MIN_ADDRESS)] = stpte; \
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TBIAP(); \
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}
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extern pt_entry_t *Lev1map; /* Alpha Level One page table */
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extern pt_entry_t *Sysmap; /* kernel pte table */
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extern vm_size_t Sysmapsize; /* number of pte's in Sysmap */
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#endif
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