332 lines
12 KiB
C
332 lines
12 KiB
C
/* $NetBSD: bus_space_defs.h,v 1.1 2011/07/01 17:28:55 dyoung Exp $ */
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/*-
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* Copyright (c) 1997, 1998, 2000, 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1996 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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#ifndef _MIPS_BUS_SPACE_DEFS_H_
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#define _MIPS_BUS_SPACE_DEFS_H_
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#include <sys/types.h>
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#ifdef _KERNEL
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#define __BUS_SPACE_HAS_STREAM_METHODS 1
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/*
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* Turn on BUS_SPACE_DEBUG if the global DEBUG option is enabled.
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*/
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#if defined(DEBUG) && !defined(BUS_SPACE_DEBUG)
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#define BUS_SPACE_DEBUG
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#endif
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#ifdef BUS_SPACE_DEBUG
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#include <sys/systm.h> /* for printf() prototype */
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/*
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* Macros for checking the aligned-ness of pointers passed to bus
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* space ops. Strict alignment is required by the MIPS architecture,
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* and a trap will occur if unaligned access is performed. These
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* may aid in the debugging of a broken device driver by displaying
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* useful information about the problem.
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*/
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#define __BUS_SPACE_ALIGNED_ADDRESS(p, t) \
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((((u_long)(p)) & (sizeof(t)-1)) == 0)
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#define __BUS_SPACE_ADDRESS_SANITY(p, t, d) \
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({ \
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if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) { \
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printf("%s 0x%lx not aligned to %lu bytes %s:%d\n", \
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d, (u_long)(p), (u_long)sizeof(t), \
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__FILE__, __LINE__); \
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} \
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(void) 0; \
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})
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#define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t)
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#else
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#define __BUS_SPACE_ADDRESS_SANITY(p, t, d) (void) 0
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#define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
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#endif /* BUS_SPACE_DEBUG */
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#endif /* _KERNEL */
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struct mips_bus_space_translation;
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/*
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* Addresses (in bus space).
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*/
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typedef paddr_t bus_addr_t;
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typedef psize_t bus_size_t;
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#define PRIxBUSADDR PRIxPADDR
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#define PRIxBUSSIZE PRIxPSIZE
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/*
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* Access methods for bus space.
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*/
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typedef struct mips_bus_space *bus_space_tag_t;
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typedef intptr_t bus_space_handle_t;
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#define PRIxBSH PRIxPTR
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struct mips_bus_space {
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/* cookie */
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void *bs_cookie;
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/* mapping/unmapping */
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int (*bs_map)(void *, bus_addr_t, bus_size_t, int,
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bus_space_handle_t *, int);
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void (*bs_unmap)(void *, bus_space_handle_t, bus_size_t,
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int);
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int (*bs_subregion)(void *, bus_space_handle_t, bus_size_t,
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bus_size_t, bus_space_handle_t *);
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/* MIPS SPECIFIC MAPPING METHOD */
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int (*bs_translate)(void *, bus_addr_t, bus_size_t, int,
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struct mips_bus_space_translation *);
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int (*bs_get_window)(void *, int,
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struct mips_bus_space_translation *);
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/* allocation/deallocation */
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int (*bs_alloc)(void *, bus_addr_t, bus_addr_t,
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bus_size_t, bus_size_t, bus_size_t, int,
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bus_addr_t *, bus_space_handle_t *);
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void (*bs_free)(void *, bus_space_handle_t, bus_size_t);
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/* get kernel virtual address */
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void * (*bs_vaddr)(void *, bus_space_handle_t);
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/* mmap for user */
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paddr_t (*bs_mmap)(void *, bus_addr_t, off_t, int, int);
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/* barrier */
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void (*bs_barrier)(void *, bus_space_handle_t,
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bus_size_t, bus_size_t, int);
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/* read (single) */
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uint8_t (*bs_r_1)(void *, bus_space_handle_t, bus_size_t);
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uint16_t (*bs_r_2)(void *, bus_space_handle_t, bus_size_t);
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uint32_t (*bs_r_4)(void *, bus_space_handle_t, bus_size_t);
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uint64_t (*bs_r_8)(void *, bus_space_handle_t, bus_size_t);
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/* read multiple */
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void (*bs_rm_1)(void *, bus_space_handle_t, bus_size_t,
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uint8_t *, bus_size_t);
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void (*bs_rm_2)(void *, bus_space_handle_t, bus_size_t,
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uint16_t *, bus_size_t);
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void (*bs_rm_4)(void *, bus_space_handle_t, bus_size_t,
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uint32_t *, bus_size_t);
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void (*bs_rm_8)(void *, bus_space_handle_t, bus_size_t,
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uint64_t *, bus_size_t);
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/* read region */
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void (*bs_rr_1)(void *, bus_space_handle_t, bus_size_t,
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uint8_t *, bus_size_t);
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void (*bs_rr_2)(void *, bus_space_handle_t, bus_size_t,
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uint16_t *, bus_size_t);
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void (*bs_rr_4)(void *, bus_space_handle_t, bus_size_t,
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uint32_t *, bus_size_t);
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void (*bs_rr_8)(void *, bus_space_handle_t, bus_size_t,
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uint64_t *, bus_size_t);
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/* write (single) */
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void (*bs_w_1)(void *, bus_space_handle_t, bus_size_t,
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uint8_t);
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void (*bs_w_2)(void *, bus_space_handle_t, bus_size_t,
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uint16_t);
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void (*bs_w_4)(void *, bus_space_handle_t, bus_size_t,
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uint32_t);
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void (*bs_w_8)(void *, bus_space_handle_t, bus_size_t,
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uint64_t);
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/* write multiple */
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void (*bs_wm_1)(void *, bus_space_handle_t, bus_size_t,
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const uint8_t *, bus_size_t);
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void (*bs_wm_2)(void *, bus_space_handle_t, bus_size_t,
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const uint16_t *, bus_size_t);
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void (*bs_wm_4)(void *, bus_space_handle_t, bus_size_t,
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const uint32_t *, bus_size_t);
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void (*bs_wm_8)(void *, bus_space_handle_t, bus_size_t,
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const uint64_t *, bus_size_t);
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/* write region */
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void (*bs_wr_1)(void *, bus_space_handle_t, bus_size_t,
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const uint8_t *, bus_size_t);
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void (*bs_wr_2)(void *, bus_space_handle_t, bus_size_t,
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const uint16_t *, bus_size_t);
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void (*bs_wr_4)(void *, bus_space_handle_t, bus_size_t,
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const uint32_t *, bus_size_t);
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void (*bs_wr_8)(void *, bus_space_handle_t, bus_size_t,
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const uint64_t *, bus_size_t);
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/* read (single) stream */
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uint8_t (*bs_rs_1)(void *, bus_space_handle_t, bus_size_t);
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uint16_t (*bs_rs_2)(void *, bus_space_handle_t, bus_size_t);
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uint32_t (*bs_rs_4)(void *, bus_space_handle_t, bus_size_t);
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uint64_t (*bs_rs_8)(void *, bus_space_handle_t, bus_size_t);
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/* read multiple stream */
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void (*bs_rms_1)(void *, bus_space_handle_t, bus_size_t,
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uint8_t *, bus_size_t);
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void (*bs_rms_2)(void *, bus_space_handle_t, bus_size_t,
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uint16_t *, bus_size_t);
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void (*bs_rms_4)(void *, bus_space_handle_t, bus_size_t,
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uint32_t *, bus_size_t);
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void (*bs_rms_8)(void *, bus_space_handle_t, bus_size_t,
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uint64_t *, bus_size_t);
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/* read region stream */
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void (*bs_rrs_1)(void *, bus_space_handle_t, bus_size_t,
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uint8_t *, bus_size_t);
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void (*bs_rrs_2)(void *, bus_space_handle_t, bus_size_t,
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uint16_t *, bus_size_t);
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void (*bs_rrs_4)(void *, bus_space_handle_t, bus_size_t,
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uint32_t *, bus_size_t);
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void (*bs_rrs_8)(void *, bus_space_handle_t, bus_size_t,
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uint64_t *, bus_size_t);
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/* write (single) stream */
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void (*bs_ws_1)(void *, bus_space_handle_t, bus_size_t,
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uint8_t);
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void (*bs_ws_2)(void *, bus_space_handle_t, bus_size_t,
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uint16_t);
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void (*bs_ws_4)(void *, bus_space_handle_t, bus_size_t,
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uint32_t);
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void (*bs_ws_8)(void *, bus_space_handle_t, bus_size_t,
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uint64_t);
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/* write multiple stream */
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void (*bs_wms_1)(void *, bus_space_handle_t, bus_size_t,
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const uint8_t *, bus_size_t);
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void (*bs_wms_2)(void *, bus_space_handle_t, bus_size_t,
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const uint16_t *, bus_size_t);
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void (*bs_wms_4)(void *, bus_space_handle_t, bus_size_t,
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const uint32_t *, bus_size_t);
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void (*bs_wms_8)(void *, bus_space_handle_t, bus_size_t,
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const uint64_t *, bus_size_t);
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/* write region stream */
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void (*bs_wrs_1)(void *, bus_space_handle_t, bus_size_t,
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const uint8_t *, bus_size_t);
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void (*bs_wrs_2)(void *, bus_space_handle_t, bus_size_t,
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const uint16_t *, bus_size_t);
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void (*bs_wrs_4)(void *, bus_space_handle_t, bus_size_t,
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const uint32_t *, bus_size_t);
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void (*bs_wrs_8)(void *, bus_space_handle_t, bus_size_t,
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const uint64_t *, bus_size_t);
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/* set multiple */
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void (*bs_sm_1)(void *, bus_space_handle_t, bus_size_t,
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uint8_t, bus_size_t);
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void (*bs_sm_2)(void *, bus_space_handle_t, bus_size_t,
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uint16_t, bus_size_t);
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void (*bs_sm_4)(void *, bus_space_handle_t, bus_size_t,
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uint32_t, bus_size_t);
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void (*bs_sm_8)(void *, bus_space_handle_t, bus_size_t,
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uint64_t, bus_size_t);
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/* set region */
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void (*bs_sr_1)(void *, bus_space_handle_t, bus_size_t,
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uint8_t, bus_size_t);
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void (*bs_sr_2)(void *, bus_space_handle_t, bus_size_t,
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uint16_t, bus_size_t);
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void (*bs_sr_4)(void *, bus_space_handle_t, bus_size_t,
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uint32_t, bus_size_t);
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void (*bs_sr_8)(void *, bus_space_handle_t, bus_size_t,
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uint64_t, bus_size_t);
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/* copy */
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void (*bs_c_1)(void *, bus_space_handle_t, bus_size_t,
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bus_space_handle_t, bus_size_t, bus_size_t);
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void (*bs_c_2)(void *, bus_space_handle_t, bus_size_t,
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bus_space_handle_t, bus_size_t, bus_size_t);
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void (*bs_c_4)(void *, bus_space_handle_t, bus_size_t,
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bus_space_handle_t, bus_size_t, bus_size_t);
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void (*bs_c_8)(void *, bus_space_handle_t, bus_size_t,
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bus_space_handle_t, bus_size_t, bus_size_t);
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};
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/*
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* Translation of an MIPS bus address; INTERNAL USE ONLY.
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*/
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struct mips_bus_space_translation {
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bus_addr_t mbst_bus_start; /* start of bus window */
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bus_addr_t mbst_bus_end; /* end of bus window */
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paddr_t mbst_sys_start; /* start of sysBus window */
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paddr_t mbst_sys_end; /* end of sysBus window */
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int mbst_align_stride;/* alignment stride */
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int mbst_flags; /* flags; see below */
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};
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#define BUS_SPACE_MAP_CACHEABLE 0x01
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#define BUS_SPACE_MAP_LINEAR 0x02
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#define BUS_SPACE_MAP_PREFETCHABLE 0x04
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#ifdef _KERNEL
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#define BUS_SPACE_BARRIER_READ 0x01
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#define BUS_SPACE_BARRIER_WRITE 0x02
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/*
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* New style.
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*/
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#define BUS_SPACE_BARRIER_SYNC 0x03
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#define BUS_SPACE_BARRIER_READ_BEFORE_READ BUS_SPACE_BARRIER_READ
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#define BUS_SPACE_BARRIER_READ_BEFORE_WRITE BUS_SPACE_BARRIER_READ
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#define BUS_SPACE_BARRIER_WRITE_BEFORE_READ BUS_SPACE_BARRIER_WRITE
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#define BUS_SPACE_BARRIER_WRITE_BEFORE_WRITE BUS_SPACE_BARRIER_WRITE
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#endif /* _KERNEL */
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#endif /* _MIPS_BUS_SPACE_DEFS_H_ */
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