305 lines
9.3 KiB
C
305 lines
9.3 KiB
C
/* $NetBSD: rtl81x9var.h,v 1.39 2007/03/21 12:17:31 tsutsui Exp $ */
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/*
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* Copyright (c) 1997, 1998
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* Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Bill Paul.
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* 4. Neither the name of the author nor the names of any co-contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*
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* FreeBSD Id: if_rlreg.h,v 1.9 1999/06/20 18:56:09 wpaul Exp
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*/
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#include "rnd.h"
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#if NRND > 0
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#include <sys/rnd.h>
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#endif
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#define RTK_ETHER_ALIGN 2
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#define RTK_RXSTAT_LEN 4
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#ifdef __NO_STRICT_ALIGNMENT
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/*
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* XXX According to PR kern/33763, some 8168 and variants can't DMA
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* XXX RX packet data into unaligned buffer. This means such chips will
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* XXX never work on !__NO_STRICT_ALIGNMENT hosts without copying buffer.
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*/
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#define RE_ETHER_ALIGN 0
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#else
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#define RE_ETHER_ALIGN 2
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#endif
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struct rtk_type {
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uint16_t rtk_vid;
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uint16_t rtk_did;
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int rtk_basetype;
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#define RTK_8129 1
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#define RTK_8139 2
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#define RTK_8139CPLUS 3
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#define RTK_8169 4
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#define RTK_8168 5
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#define RTK_8101E 6
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const char *rtk_name;
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};
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struct rtk_mii_frame {
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uint8_t mii_stdelim;
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uint8_t mii_opcode;
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uint8_t mii_phyaddr;
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uint8_t mii_regaddr;
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uint8_t mii_turnaround;
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uint16_t mii_data;
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};
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/*
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* MII constants
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*/
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#define RTK_MII_STARTDELIM 0x01
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#define RTK_MII_READOP 0x02
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#define RTK_MII_WRITEOP 0x01
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#define RTK_MII_TURNAROUND 0x02
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/*
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* The RealTek doesn't use a fragment-based descriptor mechanism.
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* Instead, there are only four register sets, each or which represents
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* one 'descriptor.' Basically, each TX descriptor is just a contiguous
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* packet buffer (32-bit aligned!) and we place the buffer addresses in
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* the registers so the chip knows where they are.
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*
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* We can sort of kludge together the same kind of buffer management
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* used in previous drivers, but we have to do buffer copies almost all
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* the time, so it doesn't really buy us much.
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*
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* For reception, there's just one large buffer where the chip stores
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* all received packets.
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*/
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#ifdef dreamcast
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/*
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* XXX dreamcast has only 32KB DMA'able memory on its PCI bridge.
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* XXX Maybe this should be handled by prop_dictionary, or
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* XXX some other new API which returns available DMA resources.
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*/
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#define RTK_RX_BUF_SZ RTK_RXBUF_16
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#else
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#define RTK_RX_BUF_SZ RTK_RXBUF_64
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#endif
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#define RTK_RXBUFLEN RTK_RXBUF_LEN(RTK_RX_BUF_SZ)
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#define RTK_TX_LIST_CNT 4
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/*
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* The 8139C+ and 8169 gigE chips support descriptor-based TX
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* and RX. In fact, they even support TCP large send. Descriptors
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* must be allocated in contiguous blocks that are aligned on a
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* 256-byte boundary. The RX rings can hold a maximum of 64 descriptors.
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* The TX rings can hold upto 64 descriptors on 8139C+, and
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* 1024 descriptors on 8169 gigE chips.
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*/
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#define RE_RING_ALIGN 256
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/*
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* Size of descriptors and TX queue.
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* These numbers must be power of two to simplify RE_NEXT_*() macro.
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*/
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#define RE_RX_DESC_CNT 64
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#define RE_TX_DESC_CNT_8139 64
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#define RE_TX_DESC_CNT_8169 1024
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#define RE_TX_QLEN 64
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#define RE_NTXDESC_RSVD 4
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struct re_rxsoft {
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struct mbuf *rxs_mbuf;
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bus_dmamap_t rxs_dmamap;
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};
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struct re_txq {
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struct mbuf *txq_mbuf;
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bus_dmamap_t txq_dmamap;
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int txq_descidx;
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int txq_nsegs;
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};
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struct re_list_data {
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struct re_txq re_txq[RE_TX_QLEN];
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int re_txq_considx;
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int re_txq_prodidx;
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int re_txq_free;
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bus_dmamap_t re_tx_list_map;
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struct re_desc *re_tx_list;
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int re_tx_free; /* # of free descriptors */
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int re_tx_nextfree; /* next descriptor to use */
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int re_tx_desc_cnt; /* # of descriptors */
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bus_dma_segment_t re_tx_listseg;
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int re_tx_listnseg;
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struct re_rxsoft re_rxsoft[RE_RX_DESC_CNT];
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bus_dmamap_t re_rx_list_map;
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struct re_desc *re_rx_list;
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int re_rx_prodidx;
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bus_dma_segment_t re_rx_listseg;
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int re_rx_listnseg;
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};
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struct rtk_tx_desc {
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SIMPLEQ_ENTRY(rtk_tx_desc) txd_q;
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struct mbuf *txd_mbuf;
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bus_dmamap_t txd_dmamap;
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bus_addr_t txd_txaddr;
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bus_addr_t txd_txstat;
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};
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struct rtk_softc {
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struct device sc_dev; /* generic device structures */
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struct ethercom ethercom; /* interface info */
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struct mii_data mii;
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struct callout rtk_tick_ch; /* tick callout */
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bus_space_handle_t rtk_bhandle; /* bus space handle */
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bus_space_tag_t rtk_btag; /* bus space tag */
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u_int sc_quirk; /* chip quirks */
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#define RTKQ_8129 0x00000001 /* 8129 */
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#define RTKQ_8139CPLUS 0x00000002 /* 8139C+ */
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#define RTKQ_8169NONS 0x00000004 /* old non-single 8169 */
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#define RTKQ_PCIE 0x00000008 /* PCIe variants */
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bus_dma_tag_t sc_dmat;
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bus_dma_segment_t sc_dmaseg; /* for rtk(4) */
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int sc_dmanseg; /* for rtk(4) */
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bus_dmamap_t recv_dmamap; /* for rtk(4) */
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void * rtk_rx_buf;
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struct rtk_tx_desc rtk_tx_descs[RTK_TX_LIST_CNT];
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SIMPLEQ_HEAD(, rtk_tx_desc) rtk_tx_free;
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SIMPLEQ_HEAD(, rtk_tx_desc) rtk_tx_dirty;
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struct re_list_data re_ldata;
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struct mbuf *re_head;
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struct mbuf *re_tail;
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uint32_t re_rxlenmask;
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int re_testmode;
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int sc_flags; /* misc flags */
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#define RTK_ATTACHED 0x00000001 /* attach has succeeded */
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#define RTK_ENABLED 0x00000002 /* chip is enabled */
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#define RTK_IS_ENABLED(sc) ((sc)->sc_flags & RTK_ENABLED)
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int sc_txthresh; /* Early tx threshold */
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int sc_rev; /* MII revision */
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void *sc_sdhook; /* shutdown hook */
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void *sc_powerhook; /* power management hook */
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/* Power management hooks. */
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int (*sc_enable) (struct rtk_softc *);
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void (*sc_disable) (struct rtk_softc *);
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void (*sc_power) (struct rtk_softc *, int);
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#if NRND > 0
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rndsource_element_t rnd_source;
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#endif
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};
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#define RE_TX_DESC_CNT(sc) ((sc)->re_ldata.re_tx_desc_cnt)
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#define RE_TX_LIST_SZ(sc) (RE_TX_DESC_CNT(sc) * sizeof(struct re_desc))
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#define RE_NEXT_TX_DESC(sc, x) (((x) + 1) & (RE_TX_DESC_CNT(sc) - 1))
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#define RE_RX_LIST_SZ (RE_RX_DESC_CNT * sizeof(struct re_desc))
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#define RE_NEXT_RX_DESC(sc, x) (((x) + 1) & (RE_RX_DESC_CNT - 1))
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#define RE_NEXT_TXQ(sc, x) (((x) + 1) & (RE_TX_QLEN - 1))
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#define RE_TXDESCSYNC(sc, idx, ops) \
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bus_dmamap_sync((sc)->sc_dmat, \
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(sc)->re_ldata.re_tx_list_map, \
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sizeof(struct re_desc) * (idx), \
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sizeof(struct re_desc), \
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(ops))
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#define RE_RXDESCSYNC(sc, idx, ops) \
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bus_dmamap_sync((sc)->sc_dmat, \
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(sc)->re_ldata.re_rx_list_map, \
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sizeof(struct re_desc) * (idx), \
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sizeof(struct re_desc), \
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(ops))
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/*
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* re(4) hardware ip4csum-tx could be mangled with 28 byte or less IP packets
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*/
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#define RE_IP4CSUMTX_MINLEN 28
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#define RE_IP4CSUMTX_PADLEN (ETHER_HDR_LEN + RE_IP4CSUMTX_MINLEN)
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/*
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* XXX
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* We are allocating pad DMA buffer after RX DMA descs for now
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* because RE_TX_LIST_SZ(sc) always occupies whole page but
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* RE_RX_LIST_SZ is less than PAGE_SIZE so there is some unused region.
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*/
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#define RE_RX_DMAMEM_SZ (RE_RX_LIST_SZ + RE_IP4CSUMTX_PADLEN)
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#define RE_TXPADOFF RE_RX_LIST_SZ
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#define RE_TXPADDADDR(sc) \
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((sc)->re_ldata.re_rx_list_map->dm_segs[0].ds_addr + RE_TXPADOFF)
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#define RTK_TXTH_MAX RTK_TXTH_1536
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/*
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* register space access macros
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*/
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#define CSR_WRITE_4(sc, reg, val) \
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bus_space_write_4(sc->rtk_btag, sc->rtk_bhandle, reg, val)
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#define CSR_WRITE_2(sc, reg, val) \
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bus_space_write_2(sc->rtk_btag, sc->rtk_bhandle, reg, val)
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#define CSR_WRITE_1(sc, reg, val) \
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bus_space_write_1(sc->rtk_btag, sc->rtk_bhandle, reg, val)
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#define CSR_READ_4(sc, reg) \
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bus_space_read_4(sc->rtk_btag, sc->rtk_bhandle, reg)
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#define CSR_READ_2(sc, reg) \
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bus_space_read_2(sc->rtk_btag, sc->rtk_bhandle, reg)
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#define CSR_READ_1(sc, reg) \
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bus_space_read_1(sc->rtk_btag, sc->rtk_bhandle, reg)
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#define RTK_TIMEOUT 1000
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/*
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* PCI low memory base and low I/O base registers
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*/
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#define RTK_PCI_LOIO 0x10
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#define RTK_PCI_LOMEM 0x14
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#ifdef _KERNEL
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uint16_t rtk_read_eeprom(struct rtk_softc *, int, int);
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void rtk_setmulti(struct rtk_softc *);
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void rtk_attach(struct rtk_softc *);
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int rtk_detach(struct rtk_softc *);
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int rtk_activate(struct device *, enum devact);
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int rtk_intr(void *);
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#endif /* _KERNEL */
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