207 lines
7.3 KiB
C
207 lines
7.3 KiB
C
/* $NetBSD: reg.h,v 1.6 2000/01/10 03:53:20 eeh Exp $ */
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/*
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This software was developed by the Computer Systems Engineering group
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* at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
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* contributed to Berkeley.
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*
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* All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Lawrence Berkeley Laboratory.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)reg.h 8.1 (Berkeley) 6/11/93
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*/
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#ifndef _MACHINE_REG_H_
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#define _MACHINE_REG_H_
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/*
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* Registers passed to trap/syscall/etc.
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* This structure is known to occupy exactly 80 bytes (see locore.s).
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* Note, tf_global[0] is not actually written (since g0 is always 0).
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* (The slot tf_global[0] is used to send a copy of %wim to kernel gdb.
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* This is known as `cheating'.)
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*/
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struct trapframe32 {
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int tf_psr; /* psr */
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int tf_pc; /* return pc */
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int tf_npc; /* return npc */
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int tf_y; /* %y register */
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int tf_global[8]; /* global registers in trap's caller */
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int tf_out[8]; /* output registers in trap's caller */
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};
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/*
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* The v9 trapframe is a bit more complex. Since we don't get a free
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* register window with each trap we need some way to keep track of
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* pending traps. We use tf_fault to save the faulting address for
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* memory faults and tf_kstack to thread trapframes on the kernel
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* stack(s). If tf_kstack == 0 then this is the lowest level trap;
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* we came from user mode.
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* (The slot tf_global[0] is used to store the %fp when this is used
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* as a clockframe. This is known as `cheating'.)
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*/
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struct trapframe64 {
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int64_t tf_tstate; /* tstate register */
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int64_t tf_pc; /* return pc */
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int64_t tf_npc; /* return npc */
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int64_t tf_fault; /* faulting addr -- need somewhere to save it */
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int64_t tf_kstack; /* kernel stack of prev tf */
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int tf_y; /* %y register -- 32-bits */
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short tf_tt; /* What type of trap this was */
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char tf_pil; /* What IRQ we're handling */
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char tf_oldpil; /* What our old SPL was */
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int64_t tf_global[8]; /* global registers in trap's caller */
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/* n.b. tf_global[0] is used for fp when this is a clockframe */
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int64_t tf_out[8]; /* output registers in trap's caller */
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int64_t tf_local[8]; /* local registers in trap's caller */
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int64_t tf_in[8]; /* in registers in trap's caller (for debug) */
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};
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/*
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* Register windows. Each stack pointer (%o6 aka %sp) in each window
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* must ALWAYS point to some place at which it is safe to scribble on
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* 64 bytes. (If not, your process gets mangled.) Furthermore, each
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* stack pointer should be aligned on an 8-byte boundary for v8 stacks
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* or a 16-byte boundary (plus the BIAS) for v9 stacks (the kernel
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* as currently coded allows arbitrary alignment, but with a hefty
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* performance penalty).
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*/
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struct rwindow32 {
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int rw_local[8]; /* %l0..%l7 */
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int rw_in[8]; /* %i0..%i7 */
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};
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/* Don't forget the BIAS!! */
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struct rwindow64 {
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int64_t rw_local[8]; /* %l0..%l7 */
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int64_t rw_in[8]; /* %i0..%i7 */
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};
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/*
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* Clone trapframe for now; this seems to be the more useful
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* than the old struct reg above.
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*/
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struct reg32 {
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int r_psr; /* psr */
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int r_pc; /* return pc */
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int r_npc; /* return npc */
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int r_y; /* %y register */
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int r_global[8]; /* global registers in trap's caller */
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int r_out[8]; /* output registers in trap's caller */
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};
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struct reg64 {
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int64_t r_tstate; /* tstate register */
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int64_t r_pc; /* return pc */
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int64_t r_npc; /* return npc */
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int r_y; /* %y register -- 32-bits */
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int64_t r_global[8]; /* global registers in trap's caller */
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int64_t r_out[8]; /* output registers in trap's caller */
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};
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#include <machine/fsr.h>
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/*
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* FP coprocessor registers.
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*
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* FP_QSIZE is the maximum coprocessor instruction queue depth
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* of any implementation on which the kernel will run. David Hough:
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* ``I'd suggest allowing 16 ... allowing an indeterminate variable
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* size would be even better''. Of course, we cannot do that; we
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* need to malloc these.
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*
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* XXXX UltraSPARC processors don't implement a floating point queue.
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*/
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#define FP_QSIZE 16
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#define ALIGNFPSTATE(f) ((struct fpstate64 *)(((long)(f))&(~BLOCK_ALIGN)))
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struct fp_qentry {
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int *fq_addr; /* the instruction's address */
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int fq_instr; /* the instruction itself */
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};
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struct fpstate64 {
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u_int fs_regs[64]; /* our view is 64 32-bit registers */
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int64_t fs_fsr; /* %fsr */
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int fs_gsr; /* graphics state reg */
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int fs_qsize; /* actual queue depth */
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struct fp_qentry fs_queue[FP_QSIZE]; /* queue contents */
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};
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/*
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* For 32-bit emulations.
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*/
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struct fpstate32 {
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u_int fs_regs[32]; /* our view is 32 32-bit registers */
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int fs_fsr; /* %fsr */
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int fs_qsize; /* actual queue depth */
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struct fp_qentry fs_queue[FP_QSIZE]; /* queue contents */
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};
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/*
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* The actual FP registers are made accessable (c.f. ptrace(2)) through
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* a `struct fpreg'; <arch/sparc64/sparc64/process_machdep.c> relies on the
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* fact that `fpreg' is a prefix of `fpstate'.
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*/
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struct fpreg64 {
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u_int fr_regs[64]; /* our view is 64 32-bit registers */
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int64_t fr_fsr; /* %fsr */
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int fr_gsr; /* graphics state reg */
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};
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/*
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* 32-bit fpreg used by 32-bit sparc CPUs
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*/
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struct fpreg32 {
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u_int fr_regs[32]; /* our view is 32 32-bit registers */
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int fr_fsr; /* %fsr */
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};
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#if defined(__arch64__)
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/* Here we gotta do naughty things to let gdb work on 32-bit binaries */
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#define reg reg64
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#define fpreg fpreg64
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#define trapframe trapframe64
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#define rwindow rwindow64
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#else
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#define reg reg32
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#define fpreg fpreg32
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#define trapframe trapframe32
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#define rwindow rwindow32
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#endif
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#endif /* _MACHINE_REG_H_ */
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