1876b99eba
adapted from OpenBSD with various improvements, no support for Expert3D has been added this is still suboptimal since we have to sync the engine all the time but it's an improvement over software-only operation
82 lines
2.7 KiB
C
82 lines
2.7 KiB
C
/* $NetBSD: wcfbreg.h,v 1.2 2012/10/09 21:59:19 macallan Exp $ */
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/*-
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* Copyright (c) 2010 Michael Lorenz
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* register definitions for 3Dlabs Wildcat
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* mostly from OpenBSD's ifb driver
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*/
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#ifndef WCFBREG_H
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#define WCFBREG_H
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#define WC_IFB_ENGINE 0x8000
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#define WC_JFB_ENGINE 0x6000
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#define WC_COMPONENT_SELECT 0x8040
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#define WC_STATUS 0x8044
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#define WC_STATUS_DONE 0x00000004
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#define WC_RESOLUTION 0x8070
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#define WC_CONFIG 0x8074 /* log2(stride) in 0x00ff0000 */
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#define WC_FB32_ADDR0 0x8078
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#define WC_FB32_ADDR1 0x807c
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#define WC_FB8_ADDR0 0x8080
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#define WC_FB8_ADDR1 0x8084
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#define WC_FB32_UNKNOWN 0x8088
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#define WC_FB8_UNKNOWN1 0x808c
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#define WC_FB8_UNKNOWN2 0x8090
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/* standard ternary ROP in <<16 */
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#define WC_ROP_CLEAR 0x00000000
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#define WC_ROP_COPY 0x00330000
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#define WC_ROP_XOR 0x00cc0000
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#define WC_ROP_SET 0x00ff0000
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#define WC_CMAP_INDEX 0x80bc
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#define WC_CMAP_DATA 0x80c0
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#define WCFB_COORDS(x, y) ((y) << 16 | (x))
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/* blitter directions */
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#define WC_BLT_DIR_BACKWARDS_Y (0x08 | 0x02)
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#define WC_BLT_DIR_BACKWARDS_X (0x04 | 0x01)
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/*
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* 80e4 DPMS state register
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* States ``off'' and ``suspend'' need chip reprogramming before video can
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* be enabled again.
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*/
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#define WC_DPMS_STATE 0x80e4
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#define WC_DPMS_OFF 0x00000000
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#define WC_DPMS_SUSPEND 0x00000001
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#define WC_DPMS_STANDBY 0x00000002
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#define WC_DPMS_ON 0x00000003
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#endif
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#define WC_XVR1200 0x10443d3d
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