72797e4632
Reference Design NetBSD source code, obtained from the pages under http://www.research.digital.com/SRC/iag . Some of this code (badly) needs to be cleaned up, and as-is it doesn't compile. However, getting it in the tree is a start.
296 lines
12 KiB
C
296 lines
12 KiB
C
/* $NetBSD: i8042reg.h,v 1.1.1.1 1998/05/01 21:08:55 cgd Exp $ */
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/*
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* Copyright 1997
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* Digital Equipment Corporation. All rights reserved.
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*
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* This software is furnished under license and may be used and
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* copied only in accordance with the following terms and conditions.
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* Subject to these conditions, you may download, copy, install,
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* use, modify and distribute this software in source and/or binary
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* form. No title or ownership is transferred hereby.
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*
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* 1) Any source code used, modified or distributed must reproduce
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* and retain this copyright notice and list of conditions as
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* they appear in the source file.
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*
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* 2) No right is granted to use any trade name, trademark, or logo of
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* Digital Equipment Corporation. Neither the "Digital Equipment
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* Corporation" name nor any trademark or logo of Digital Equipment
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* Corporation may be used to endorse or promote products derived
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* from this software without the prior written permission of
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* Digital Equipment Corporation.
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*
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* 3) This software is provided "AS-IS" and any express or implied
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* warranties, including but not limited to, any implied warranties
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* of merchantability, fitness for a particular purpose, or
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* non-infringement are disclaimed. In no event shall DIGITAL be
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* liable for any damages whatsoever, and in particular, DIGITAL
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* shall not be liable for special, indirect, consequential, or
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* incidental damages or damages for lost profits, loss of
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* revenue or loss of use, whether such damages arise in contract,
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* negligence, tort, under statute, in equity, at law or otherwise,
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* even if advised of the possibility of such damage.
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*/
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#ifndef _I8042_H
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#define _I8042_H
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/* Get the standard physical keyboard definitions
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*/
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#include <arm32/shark/kbdreg.h>
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/* 8042 Status register location and bit definitions
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*/
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#define KBSTATP 0x64 /* kbd controller status port (I) */
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#define KBSTATPO 0x04 /* kbd controller status port offset */
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/* from base of 8042 registers */
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#define KBS_DIB 0x01 /* kbd data in buffer */
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#define KBS_IBF 0x02 /* kbd input buffer low */
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#define KBS_WARM 0x04 /* kbd input buffer low */
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#define KBS_OCMD 0x08 /* kbd output buffer has command */
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#define KBS_NOSEC 0x10 /* kbd security lock not engaged */
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#define KBS_TERR 0x20 /* kbd transmission error. Note that */
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/* some firmware uses this bit to */
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/* indicate data in the input buffer */
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/* originated from the Auxiliary */
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/* device such as the mouse. */
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#define KBS_RERR 0x40 /* kbd receive error */
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#define KBS_PERR 0x80 /* kbd parity error */
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/* 8042 Command register location and command definitions
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*/
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#define KBCMDP 0x64 /* kbd controller port (O) */
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#define KBCMDPO 0x04 /* kbd controller port offset from */
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/* base of 8042 registers */
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#define KBC_RAMREAD 0x20 /* read from RAM */
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#define KBC_RAMWRITE 0x60 /* write to RAM */
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#define KBC_AUXDISABLE 0xa7 /* disable auxiliary port */
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#define KBC_AUXENABLE 0xa8 /* enable auxiliary port */
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#define KBC_AUXTEST 0xa9 /* test auxiliary port */
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#define KBC_KBDECHO 0xd2 /* echo to keyboard port */
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#define KBC_AUXECHO 0xd3 /* echo to auxiliary port */
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#define KBC_AUXWRITE 0xd4 /* write to auxiliary port */
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#define KBC_SELFTEST 0xaa /* start self-test */
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#define KBC_KBDTEST 0xab /* test keyboard port */
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#define KBC_KBDDISABLE 0xad /* disable keyboard port */
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#define KBC_KBDENABLE 0xae /* enable keyboard port */
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#define KBC_PULSE0 0xfe /* pulse output bit 0 */
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#define KBC_PULSE1 0xfd /* pulse output bit 1 */
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#define KBC_PULSE2 0xfb /* pulse output bit 2 */
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#define KBC_PULSE3 0xf7 /* pulse output bit 3 */
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/* 8042 Command responses.
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*/
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#define KBCR_AUXTEST_OK 0x00 /* Test on Aux device successful */
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#define KBCR_KBDTEST_OK 0x00 /* Test on keyboard device successful */
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#define KBCR_SELFTEST_OK 0x55 /* Controller self test success */
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/* Data input and output registers
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*/
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#define KBDATAP 0x60 /* kbd data port (I) */
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#define KBDATAPO 0x00 /* kbd data port offset(I) */
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#define KBOUTP 0x60 /* kbd data port (O) */
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#define KBOUTPO 0x00 /* kbd data port offset (O)*/
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/* Modify Controller Command Byte (CCB) definitions
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*/
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#define K_RDCMDBYTE 0x20
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#define K_LDCMDBYTE 0x60
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#define KC8_TRANS 0x40 /* convert to old scan codes */
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#define KC8_MDISABLE 0x20 /* disable mouse */
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#define KC8_KDISABLE 0x10 /* disable keyboard */
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#define KC8_IGNSEC 0x08 /* ignore security lock */
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#define KC8_CPU 0x04 /* exit from protected mode reset */
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#define KC8_MENABLE 0x02 /* enable mouse interrupt */
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#define KC8_KENABLE 0x01 /* enable keyboard interrupt */
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#define CMDBYTE (KC8_TRANS|KC8_CPU|KC8_MENABLE|KC8_KENABLE)
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#define NOAUX_CMDBYTE (KC8_TRANS|KC8_MDISABLE|KC8_CPU|KC8_KENABLE)
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/************************************************************************
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** Macros for controlling the 8042 microprocessor
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*************************************************************************/
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#define I8042_NPORTS 8
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#define I8042_AUX_DATA KBS_TERR|KBS_DIB /* Wait for input from mouse */
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#define I8042_KBD_DATA KBS_DIB /* Wait for input from keyboard*/
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#define I8042_ANY_DATA 0xff /* Wait for any input */
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#define I8042_CMD 0 /* Command is for keyboard controller */
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#define I8042_AUX_CMD 1 /* Command is for auxilliary port */
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#define I8042_KBD_CMD 2 /* Write to keyboard device data area */
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#define I8042_WRITE_CCB 3 /* Write Controller Command Byte */
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#define I8042_CHECK_RESPONSE 1 /* Check the command response */
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#define I8042_NO_RESPONSE 0 /* No response expected from command */
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#define I8042_DELAY delay(2) /* delay for waiting for register update*/
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#define I8042_WAIT_THRESHOLD 500000 /* Maximum times to loop waiting for*/
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/* a change in status. Currently the*/
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/* value for this is determined by */
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/* the time required for the */
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/* keyboard to perform a reset. */
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#define I8042_RETRIES 3 /* Number of times to retry nak'd cmds */
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/*
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** Forward routine declarations
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*/
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extern void i8042_flush __P((bus_space_tag_t,
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bus_space_handle_t));
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extern int i8042_cmd __P((bus_space_tag_t,
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bus_space_handle_t,
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u_char,
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u_char,
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u_char,
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u_char));
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extern int i8042_wait_output __P((bus_space_tag_t,
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bus_space_handle_t));
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extern int i8042_wait_input __P((bus_space_tag_t,
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bus_space_handle_t,
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u_char));
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/* Macro to map bus space for the 8042 device.
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** Returns 0 on success.
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*/
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#define I8042_MAP(iot, iobase, ioh) \
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(bus_space_map((iot), (iobase), I8042_NPORTS, 0, &(ioh)))
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/* Macro to unmap bus space for the 8042 device.
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*/
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#define I8042_UNMAP(iot, ioh) \
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(bus_space_unmap((iot), (ioh), I8042_NPORTS))
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/* Macro to wait and retreive data from the Auxiliary device.
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** NOTE:
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** We always check the status before reading the data port because some 8042
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** firmware seems to update the status and data AFTER the interrupt has
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** been generated. It is nasty because of the number of ISA access it
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** requires but then the alternative is failed interrupts. Also very
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** important is that there needs to be a delay after reading the data
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** since this causes the interrupt line to get cleared but because the 8042
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** is a slow processor we could return out of our interrupt handler and
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** bounce straight back in again with no data to read.
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*/
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#define I8042_GETAUX_DATA(iot, ioh, status, value) \
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{ \
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if ((status) = i8042_wait_input((iot), (ioh), I8042_AUX_DATA)) \
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{ \
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(value) = bus_space_read_1(iot, ioh, KBOUTPO); \
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I8042_DELAY; \
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} \
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}
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/* Macro to wait and retreive data from the Keyboard device.
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** NOTE:
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** We always check the status before reading the data port because some 8042
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** firmware seems to update the status and data AFTER the interrupt has
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** been generated. It is nasty because of the number of ISA access it
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** requires but then the alternative is failed interrupts. Also very
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** important is that there needs to be a delay after reading the data
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** since this causes the interrupt line to get cleared but because the 8042
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** is a slow processor we could return out of our interrupt handler and
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** bounce straight back in again with no data to read.
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*/
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#define I8042_GETKBD_DATA(iot, ioh, status, value) \
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{ \
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if ((status) = i8042_wait_input((iot), (ioh), I8042_KBD_DATA)) \
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{ \
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(value) = bus_space_read_1(iot, ioh, KBOUTPO); \
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I8042_DELAY; \
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} \
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}
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/* Macro to test whether the controller is already initialised by checking
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** the system bit in the status register.
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*/
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#define I8042_WARM(iot, ioh) \
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( bus_space_read_1((iot), (ioh), KBSTATPO ) & KBS_WARM )
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/* Macro to run self test on the 8042 controller and indicate success or
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** failure.
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*/
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#define I8042_SELFTEST(iot, ioh) \
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( i8042_cmd((iot), (ioh), I8042_CMD, I8042_CHECK_RESPONSE, \
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KBCR_SELFTEST_OK, KBC_SELFTEST) )
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/* Macro to run keyboard diagnostic test and indicate success or failure
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*/
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#define I8042_KBDTEST(iot, ioh) \
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( i8042_cmd((iot), (ioh), I8042_CMD, I8042_CHECK_RESPONSE, \
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KBCR_KBDTEST_OK, KBC_KBDTEST) )
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/* Macro to run Auxiliary device diagnostic test and indicate success or
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** failure.
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*/
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#define I8042_AUXTEST(iot, ioh) \
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( i8042_cmd((iot), (ioh), I8042_CMD, I8042_CHECK_RESPONSE, \
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KBCR_AUXTEST_OK, KBC_AUXTEST) )
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/* Macro to write the 8042 Controller Command byte
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*/
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#define I8042_WRITECCB(iot, ioh, value) \
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( i8042_cmd((iot), (ioh), I8042_WRITE_CCB, I8042_NO_RESPONSE, \
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NULL, (value)) )
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/* Macro to read the 8042 Controller Command Byte
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*/
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#define I8042_READCCB(iot, ioh, status, value) \
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{ \
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if ( (status) = i8042_cmd((iot), (ioh), I8042_CMD, \
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I8042_NO_RESPONSE, NULL, K_RDCMDBYTE) ) \
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{ \
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if ((status) = i8042_wait_input((iot),(ioh),I8042_ANY_DATA)) \
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{ \
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(value) = bus_space_read_1((iot), (ioh), KBDATAPO); \
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} \
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} \
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}
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/* Macro to disable the Auxiliary devices clock line
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*/
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#define I8042_AUXDISABLE(iot, ioh) \
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( i8042_cmd((iot), (ioh), I8042_CMD, I8042_NO_RESPONSE, \
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NULL, KBC_AUXDISABLE) )
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/* Macro to enable the Auxiliary device clock line.
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*/
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#define I8042_AUXENABLE(iot, ioh) \
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( i8042_cmd((iot), (ioh), I8042_CMD, I8042_CHECK_RESPONSE, \
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KBR_ACK, KBC_AUXENABLE) )
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/* Macro to perform reset on Keyboard device hanging off the 8042.
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*/
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#define I8042_KBDRESET(iot, ioh, status) \
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{ \
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if ( (status) = i8042_cmd((iot), (ioh), I8042_KBD_CMD, \
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I8042_CHECK_RESPONSE, \
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KBR_ACK, KBC_RESET) ) \
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{ \
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if ((status) = i8042_wait_input((iot),(ioh),I8042_ANY_DATA)) \
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{ \
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(status) = bus_space_read_1((iot), (ioh), KBDATAPO); \
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if ((status) != KBR_RSTDONE) \
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{ \
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printf("I8042_KBDRESET: bad keyboard reset " \
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"response of 0x%x\n", \
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status); \
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(status) = 0; \
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} \
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} \
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} \
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}
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#endif
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