d974db0ada
This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
166 lines
4.7 KiB
C
166 lines
4.7 KiB
C
/* $NetBSD: intr.h,v 1.21 2007/10/17 19:55:55 garbled Exp $ */
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/*-
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* Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _MACHINE_INTR_H_
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#define _MACHINE_INTR_H_
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#define IPL_NONE 0 /* disable only this interrupt */
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#define IPL_SOFT 1 /* generic software interrupts (SI 0) */
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#define IPL_SOFTCLOCK 2 /* clock software interrupts (SI 0) */
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#define IPL_SOFTNET 3 /* network software interrupts (SI 1) */
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#define IPL_SOFTSERIAL 4 /* serial software interrupts (SI 1) */
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#define IPL_BIO 5 /* disable block I/O interrupts */
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#define IPL_NET 6 /* disable network interrupts */
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#define IPL_TTY 7 /* disable terminal interrupts */
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#define IPL_LPT IPL_TTY
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#define IPL_VM IPL_TTY
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#define IPL_SERIAL 7 /* disable serial hardware interrupts */
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#define IPL_CLOCK 8 /* disable clock interrupts */
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#define IPL_STATCLOCK IPL_CLOCK
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#define IPL_SCHED IPL_CLOCK
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#define IPL_HIGH 8 /* disable all interrupts */
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#define IPL_LOCK IPL_HIGH
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#define _IPL_N 9
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#define _IPL_SI0_FIRST IPL_SOFT
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#define _IPL_SI0_LAST IPL_SOFTCLOCK
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#define _IPL_SI1_FIRST IPL_SOFTNET
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#define _IPL_SI1_LAST IPL_SOFTSERIAL
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#define SI_SOFT 0
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#define SI_SOFTCLOCK 1
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#define SI_SOFTNET 2
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#define SI_SOFTSERIAL 3
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#define SI_NQUEUES 4
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#define SI_QUEUENAMES { \
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"misc", \
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"clock", \
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"net", \
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"serial", \
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}
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#ifdef _KERNEL
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#ifndef _LOCORE
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#include <sys/device.h>
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#include <mips/locore.h>
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extern const uint32_t ipl_sr_bits[_IPL_N];
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#define spl0() (void)_spllower(0)
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#define splx(s) (void)_splset(s)
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#define splsoft() _splraise(ipl_sr_bits[IPL_SOFT])
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typedef int ipl_t;
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typedef struct {
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ipl_t _sr;
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} ipl_cookie_t;
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static inline ipl_cookie_t
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makeiplcookie(ipl_t ipl)
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{
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return (ipl_cookie_t){._sr = ipl_sr_bits[ipl]};
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}
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static inline int
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splraiseipl(ipl_cookie_t icookie)
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{
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return _splraise(icookie._sr);
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}
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#include <sys/spl.h>
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struct newsmips_intrhand {
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LIST_ENTRY(newsmips_intrhand) ih_q;
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struct evcnt intr_count;
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int (*ih_func)(void *);
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void *ih_arg;
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u_int ih_level;
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u_int ih_mask;
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u_int ih_priority;
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};
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struct newsmips_intr {
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LIST_HEAD(,newsmips_intrhand) intr_q;
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};
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#include <mips/softintr.h>
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/*
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* Index into intrcnt[], which is defined in locore
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*/
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#define SERIAL0_INTR 0
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#define SERIAL1_INTR 1
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#define SERIAL2_INTR 2
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#define LANCE_INTR 3
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#define SCSI_INTR 4
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#define ERROR_INTR 5
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#define HARDCLOCK_INTR 6
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#define FPU_INTR 7
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#define SLOT1_INTR 8
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#define SLOT2_INTR 9
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#define SLOT3_INTR 10
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#define FLOPPY_INTR 11
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#define STRAY_INTR 12
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extern u_int intrcnt[];
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/* handle i/o device interrupts */
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#ifdef news3400
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void news3400_intr(uint32_t, uint32_t, uint32_t, uint32_t);
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#endif
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#ifdef news5000
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void news5000_intr(uint32_t, uint32_t, uint32_t, uint32_t);
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#endif
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extern void (*hardware_intr)(uint32_t, uint32_t, uint32_t, uint32_t);
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extern void (*enable_intr)(void);
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extern void (*disable_intr)(void);
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extern void (*enable_timer)(void);
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#endif /* !_LOCORE */
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#endif /* _KERNEL */
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#endif /* _MACHINE_INTR_H_ */
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