74 lines
3.0 KiB
C
74 lines
3.0 KiB
C
/* $NetBSD: dcureg.h,v 1.1.1.1 1999/09/16 12:23:32 takemura Exp $ */
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/*-
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* Copyright (c) 1999 SATO Kazumi. All rights reserved.
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* Copyright (c) 1999 PocketBSD Project. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the PocketBSD project
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* and its contributors.
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* 4. Neither the name of the project nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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/*
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* DCU (DMA Control UNIT) Registers.
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* start 0x0B000040
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*/
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#define DMARST_REG_W 0x000 /* DMA Reset Register */
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#define DMARST (1) /* DMA reset */
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#define DMAIDLE_REG_W 0x002 /* DMA Idle Register */
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#define DMAISTAT (1) /* DMA Idle Status */
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#define DMAIDLE (1) /* DMA Idle */
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#define DMABUSY (0) /* DMA Busy */
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#define DMASEN_REG_W 0x004 /* DMA Sequencer Enable Register */
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#define DMASENMASK (1) /* DMA Seq Enable */
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#define DMASEN (1) /* DMA Seq Enable */
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#define DMASDS (0) /* DMA Seq Disable */
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#define DMAMSK_REG_W 0x006 /* DMA Mask Register */
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#define DMAMSKAIN (1<<3) /* Audio IN DMA Enable */
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#define DMAMSKAOUT (1<<2) /* Audio OUT DMA Enable */
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#define DMAMSKFOUT (1) /* FIR DMA Enable */
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#define DMAREQ_REG_W 0x008 /* DMA Request Register */
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#define DMAREQAIN (1<<3) /* Audio IN Request pending */
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#define DMAREQAOUT (1<<2) /* Audio OUT Request pending */
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#define DMAREQFOUT (1) /* FIR Request pending */
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#define DMATD_REG_W 0x00A /* DMA Transfer Direction Register */
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#define DMATDMASK (1) /* DMA transfer direction (FIR) */
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#define DMATDIOMEM (1) /* I/O -> MEM */
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#define DMATDMEMIO (0) /* MEM -> I/O */
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/* END dcureg.h */
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