scw 2ce95435ad One of the last pieces of the SH5 pmap jigsaw; detect and deal with ... operand cache synonyms and paradoxes for shared mappings: - Writable mappings are cache-inhibited if the underlying physical page is mapped at two or more *different* VAs. This means that read-only mappings at different VAs are still cacheable. While this could lead to operand cache synonyms, it won't cause data loss. At worst, we'd have the same read-only data in several cache-lines. - If a new cache-inhibited mapping is added for a page which has existing cacheable mappings, all the existing mappings must be made cache-inhibited. - Conversely, if a new cacheable mapping is added for a page which has existing cache-inhibited mappings, the new mapping must also be made cache-ibhibited. - When a mapping is removed, see if we can upgrade any of the underlying physical page's remaining mappings to cacheable. TODO: Deal with operand cache aliases (if necessary).		2002-10-01 15:01:48 +00:00
..
conf	Another temporary fix until I write a bootloader: run the kernel	2002-10-01 07:56:45 +00:00
dev	Rename the SH5 PCI attachment to "sh5pci" instead of abusing the "pcibus"	2002-09-28 13:08:22 +00:00
include	Flesh out bus_dmamap_sync().	2002-10-01 07:55:17 +00:00
pci	Rename the SH5 PCI attachment to "sh5pci" instead of abusing the "pcibus"	2002-09-28 13:08:22 +00:00
sh5	One of the last pieces of the SH5 pmap jigsaw; detect and deal with	2002-10-01 15:01:48 +00:00
Makefile	Descend into include subdirs and install relevant headers.	2002-07-10 08:56:11 +00:00
TODO	PCI is pretty much done.	2002-09-28 13:06:49 +00:00