0ce3451d1f
Lots of the work was done by Adam Ciarcinsky. Currently, this only supports CyberPPC boards by Phase 5. Blizzard PPC expected later. The kernel is useless but for demonstrating that it starts... especially interupts, and most of MMU support, is not in yet. Builtin console works, however, and you can look at the kernel startup messages.
97 lines
3.6 KiB
C
97 lines
3.6 KiB
C
/* $NetBSD: mtpr.h,v 1.1 2000/05/25 22:12:00 is Exp $ */
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/*
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* Copyright (c) 1988 University of Utah.
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: Utah $Hdr: mtpr.h 1.1 90/07/09$
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*
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* @(#)mtpr.h 7.2 (Berkeley) 11/3/90
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*/
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#ifndef _MACHINE_MPTR_H_
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#define _MACHINE_MPTR_H_
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#ifdef _KERNEL
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/*
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* simulated software interrupt register (extends hardware
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* SOFTINT bit)
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*/
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/*
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* this makes it pretty machine dependant. Should this go into
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* <amiga/amiga/mtpr.h> ?
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*/
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#include <amiga/amiga/custom.h>
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#ifdef DRACO
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#include <amiga/amiga/drcustom.h>
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#include <m68k/include/asm_single.h>
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#endif
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extern unsigned char ssir;
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#define SIR_NET 0x1 /* call netintr */
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#define SIR_CLOCK 0x2 /* call softclock */
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#define SIR_CBACK 0x4 /* walk the sicallback-chain */
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#define siroff(x) ssir &= ~(x)
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#ifdef DRACO
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#define setsoftint() do { if (is_draco()) \
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single_inst_bset_b(*draco_intfrc, DRIRQ_SOFT); \
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else \
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custom.intreq = INTF_SETCLR|INTF_SOFTINT; \
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} while (0)
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#define clrsoftint() do { if (is_draco()) \
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single_inst_bclr_b(*draco_intfrc, DRIRQ_SOFT); \
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else \
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custom.intreq = INTF_SOFTINT; \
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} while (0)
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#else
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#define setsoftint() do {custom.intreq = INTF_SETCLR|INTF_SOFTINT;} while (0)
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#define clrsoftint() do {custom.intreq = INTF_SOFTINT;} while (0)
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#endif
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#define setsoftnet() do {ssir |= SIR_NET; setsoftint(); } while (0)
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#define setsoftclock() do {ssir |= SIR_CLOCK; setsoftint(); } while (0)
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#define setsoftcback() do {ssir |= SIR_CBACK; setsoftint(); } while (0)
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void softintr_schedule __P((void *));
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void *softintr_establish __P((int, void (*)(void *), void *));
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void softintr_disestablish __P((void *));
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#endif /* _KERNEL */
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#endif /* !_MACHINE_MPTR_H_ */
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