678 lines
16 KiB
C
678 lines
16 KiB
C
/* $NetBSD: gxio.c,v 1.20 2012/12/24 06:50:35 kiyohara Exp $ */
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/*
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* Copyright (C) 2005, 2006, 2007 WIDE Project and SOUM Corporation.
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* All rights reserved.
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*
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* Written by Takashi Kiyohara and Susumu Miki for WIDE Project and SOUM
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* Corporation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the project nor the name of SOUM Corporation
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE PROJECT and SOUM CORPORATION ``AS IS''
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE PROJECT AND SOUM CORPORATION
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: gxio.c,v 1.20 2012/12/24 06:50:35 kiyohara Exp $");
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#include "opt_cputypes.h"
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#include "opt_gumstix.h"
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#include "opt_gxio.h"
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#if defined(OVERO)
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#include "opt_omap.h"
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#endif
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#include <sys/param.h>
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#include <sys/device.h>
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#include <sys/errno.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <machine/bootconfig.h>
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#if defined(OVERO)
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#include <arm/omap/omap2_gpmcreg.h>
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#include <arm/omap/omap2_reg.h>
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#if defined(OMAP3530)
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#include <arm/omap/omap2_intr.h>
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#endif
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#include <arm/omap/omap_var.h>
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#endif
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#if defined(CPU_XSCALE_PXA270) || defined(CPU_XSCALE_PXA250)
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#include <arm/xscale/pxa2x0cpu.h>
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#endif
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#include <arm/xscale/pxa2x0reg.h>
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#include <arm/xscale/pxa2x0var.h>
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#include <arm/xscale/pxa2x0_gpio.h>
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#include <evbarm/gumstix/gumstixreg.h>
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#include <evbarm/gumstix/gumstixvar.h>
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#include "ioconf.h"
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#include "locators.h"
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struct gxioconf {
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const char *name;
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void (*config)(void);
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};
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#if defined(GUMSTIX)
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static int gxiomatch(device_t, cfdata_t, void *);
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static void gxioattach(device_t, device_t, void *);
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static int gxiosearch(device_t, cfdata_t, const int *, void *);
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static int gxioprint(void *, const char *);
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CFATTACH_DECL_NEW(gxio, sizeof(struct gxio_softc),
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gxiomatch, gxioattach, NULL, NULL);
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#endif
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void gxio_config_pin(void);
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void gxio_config_expansion(char *);
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static void gxio_config_gpio(const struct gxioconf *, char *);
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#if defined(GUMSTIX)
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static void basix_config(void);
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static void cfstix_config(void);
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static void etherstix_config(void);
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static void netcf_config(void);
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static void netcf_vx_config(void);
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static void netduommc_config(void);
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static void netduo_config(void);
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static void netmicrosd_config(void);
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static void netwifimicrosd_config(void);
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static void netmmc_config(void);
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static void wifistix_config(void);
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static void wifistix_cf_config(void);
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#elif defined(OVERO)
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static void eth0_config(void);
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static void eth1_config(void);
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static void chestnut_config(void);
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static void tobi_config(void);
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static void tobiduo_config(void);
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#endif
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#if defined(CPU_XSCALE_PXA250)
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static struct pxa2x0_gpioconf pxa255dep_gpioconf[] = {
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/* Bluetooth module configuration */
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{ 7, GPIO_OUT | GPIO_SET }, /* power on */
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{ 12, GPIO_ALT_FN_1_OUT }, /* 32kHz out. required by SingleStone */
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/* AC97 configuration */
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{ 29, GPIO_ALT_FN_1_IN }, /* SDATA_IN0 */
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/* FFUART configuration */
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{ 35, GPIO_ALT_FN_1_IN }, /* CTS */
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{ 41, GPIO_ALT_FN_2_OUT }, /* RTS */
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#ifndef GXIO_BLUETOOTH_ON_HWUART
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/* BTUART configuration */
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{ 44, GPIO_ALT_FN_1_IN }, /* BTCTS */
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{ 45, GPIO_ALT_FN_2_OUT }, /* BTRTS */
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#else
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/* HWUART configuration */
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{ 42, GPIO_ALT_FN_3_IN }, /* HWRXD */
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{ 43, GPIO_ALT_FN_3_OUT }, /* HWTXD */
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{ 44, GPIO_ALT_FN_3_IN }, /* HWCTS */
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{ 45, GPIO_ALT_FN_3_OUT }, /* HWRTS */
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#endif
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#ifndef GXIO_BLUETOOTH_ON_HWUART
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/* HWUART configuration */
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{ 48, GPIO_ALT_FN_1_OUT }, /* HWTXD */
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{ 49, GPIO_ALT_FN_1_IN }, /* HWRXD */
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{ 50, GPIO_ALT_FN_1_IN }, /* HWCTS */
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{ 51, GPIO_ALT_FN_1_OUT }, /* HWRTS */
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#endif
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{ -1 }
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};
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#endif
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#if defined(CPU_XSCALE_PXA270)
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static struct pxa2x0_gpioconf verdexdep_gpioconf[] = {
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/* Bluetooth module configuration */
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{ 9, GPIO_ALT_FN_3_OUT }, /* CHOUT<0> */
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{ 12, GPIO_OUT | GPIO_SET },
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/* LCD configuration */
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{ 17, GPIO_IN }, /* backlight on */
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/* FFUART configuration */
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{ 34, GPIO_ALT_FN_1_IN }, /* FFRXD */
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{ 39, GPIO_ALT_FN_2_OUT }, /* FFTXD */
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/* BTUART configuration */
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{ 42, GPIO_ALT_FN_1_IN }, /* BTRXD */
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{ 43, GPIO_ALT_FN_2_OUT }, /* BTTXD */
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{ 44, GPIO_ALT_FN_1_IN }, /* BTCTS */
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{ 45, GPIO_ALT_FN_2_OUT }, /* BTRTS */
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/* AC97 configuration */
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{ 29, GPIO_ALT_FN_1_IN }, /* SDATA_IN0 */
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{ -1 }
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};
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#endif
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static const struct gxioconf busheader_conf[] = {
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#if defined(GUMSTIX)
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{ "basix", basix_config },
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{ "cfstix", cfstix_config },
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{ "etherstix", etherstix_config },
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{ "netcf", netcf_config },
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{ "netcf-vx", netcf_vx_config },
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{ "netduo-mmc", netduommc_config },
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{ "netduo", netduo_config },
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{ "netmicrosd", netmicrosd_config },
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{ "netmicrosd-vx", netmicrosd_config },
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{ "netwifimicrosd", netwifimicrosd_config },
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{ "netmmc", netmmc_config },
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{ "netpro-vx", netwifimicrosd_config },
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{ "wifistix-cf", wifistix_cf_config },
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{ "wifistix", wifistix_config },
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#elif defined(OVERO)
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{ "chestnut43", chestnut_config },
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{ "tobi", tobi_config },
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{ "tobi-duo", tobiduo_config },
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#endif
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{ NULL }
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};
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int gxpcic_gpio_reset;
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struct gxpcic_slot_irqs gxpcic_slot_irqs[2] = { { 0, -1, -1 }, { 0, -1, -1 } };
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#if defined(GUMSTIX)
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/* ARGSUSED */
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static int
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gxiomatch(device_t parent, cfdata_t match, void *aux)
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{
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struct pxaip_attach_args *pxa = aux;
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bus_space_tag_t iot = &pxa2x0_bs_tag;
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bus_space_handle_t ioh;
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if (strcmp(pxa->pxa_name, match->cf_name) != 0 ||
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pxa->pxa_addr != PXAIPCF_ADDR_DEFAULT)
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return 0;
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if (bus_space_map(iot,
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PXA2X0_MEMCTL_BASE, PXA2X0_MEMCTL_SIZE, 0, &ioh))
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return 0;
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bus_space_unmap(iot, ioh, PXA2X0_MEMCTL_SIZE);
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/* nothing */
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return 1;
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}
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/* ARGSUSED */
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static void
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gxioattach(device_t parent, device_t self, void *aux)
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{
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struct gxio_softc *sc = device_private(self);
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aprint_normal("\n");
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aprint_naive("\n");
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sc->sc_dev = self;
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sc->sc_iot = &pxa2x0_bs_tag;
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if (bus_space_map(sc->sc_iot,
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PXA2X0_MEMCTL_BASE, PXA2X0_MEMCTL_SIZE, 0, &sc->sc_ioh))
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return;
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/*
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* Attach each gumstix(busheader)/overo expansion board devices.
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*/
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config_search_ia(gxiosearch, self, "gxio", NULL);
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}
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/* ARGSUSED */
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static int
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gxiosearch(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
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{
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struct gxio_softc *sc = device_private(parent);
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struct gxio_attach_args gxa;
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gxa.gxa_sc = sc;
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gxa.gxa_iot = sc->sc_iot;
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gxa.gxa_addr = cf->cf_loc[GXIOCF_ADDR];
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gxa.gxa_gpirq = cf->cf_loc[GXIOCF_GPIRQ];
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if (config_match(parent, cf, &gxa))
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config_attach(parent, cf, &gxa, gxioprint);
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return 0;
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}
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/* ARGSUSED */
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static int
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gxioprint(void *aux, const char *name)
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{
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struct gxio_attach_args *gxa = (struct gxio_attach_args *)aux;
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if (gxa->gxa_addr != GXIOCF_ADDR_DEFAULT)
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printf(" addr 0x%lx", gxa->gxa_addr);
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if (gxa->gxa_gpirq > 0)
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printf(" gpirq %d", gxa->gxa_gpirq);
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return UNCONF;
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}
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#endif
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/*
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* configure for GPIO pin and expansion boards.
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*/
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void
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gxio_config_pin(void)
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{
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#if defined(CPU_XSCALE_PXA250)
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struct pxa2x0_gpioconf *gumstix_gpioconf[] = {
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pxa25x_com_ffuart_gpioconf,
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pxa25x_com_stuart_gpioconf,
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#ifndef GXIO_BLUETOOTH_ON_HWUART
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pxa25x_com_btuart_gpioconf,
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#endif
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pxa25x_com_hwuart_gpioconf,
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pxa25x_i2c_gpioconf,
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pxa25x_pxaacu_gpioconf,
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pxa255dep_gpioconf,
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NULL
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};
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#endif
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#if defined(CPU_XSCALE_PXA270)
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struct pxa2x0_gpioconf *verdex_gpioconf[] = {
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pxa27x_com_ffuart_gpioconf,
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pxa27x_com_stuart_gpioconf,
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pxa27x_com_btuart_gpioconf,
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pxa27x_i2c_gpioconf,
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pxa27x_pxaacu_gpioconf,
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pxa27x_pxamci_gpioconf,
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pxa27x_ohci_gpioconf,
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verdexdep_gpioconf,
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NULL
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};
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#endif
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/* XXX: turn off for power of bluetooth module */
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#if defined(CPU_XSCALE_PXA250)
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pxa2x0_gpio_set_function(7, GPIO_OUT | GPIO_CLR);
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#elif defined(CPU_XSCALE_PXA270)
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pxa2x0_gpio_set_function(12, GPIO_OUT | GPIO_CLR);
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#endif
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delay(100);
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#if defined(CPU_XSCALE_PXA270) && defined(CPU_XSCALE_PXA250)
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pxa2x0_gpio_config(
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(CPU_IS_PXA250) ? gumstix_gpioconf : verdex_gpioconf);
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#elif defined(CPU_XSCALE_PXA270) || defined(CPU_XSCALE_PXA250)
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#if defined(CPU_XSCALE_PXA270)
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pxa2x0_gpio_config(verdex_gpioconf);
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#else
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pxa2x0_gpio_config(gumstix_gpioconf);
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#endif
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#endif
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}
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void
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gxio_config_expansion(char *expansion)
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{
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if (expansion == NULL) {
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printf("not specified 'expansion=' in the boot args.\n");
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#ifdef GXIO_DEFAULT_EXPANSION
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printf("configure default expansion (%s)\n",
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GXIO_DEFAULT_EXPANSION);
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expansion = __UNCONST(GXIO_DEFAULT_EXPANSION);
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#else
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return;
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#endif
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}
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gxio_config_gpio(busheader_conf, expansion);
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}
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static void
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gxio_config_gpio(const struct gxioconf *gxioconflist, char *expansion)
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{
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int i, rv;
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for (i = 0; i < strlen(expansion); i++)
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expansion[i] = tolower(expansion[i]);
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for (i = 0; gxioconflist[i].name != NULL; i++) {
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rv = strncmp(expansion, gxioconflist[i].name,
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strlen(gxioconflist[i].name) + 1);
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if (rv == 0) {
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gxioconflist[i].config();
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break;
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}
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}
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}
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#if defined(GUMSTIX)
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static void
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basix_config(void)
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{
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pxa2x0_gpio_set_function(8, GPIO_ALT_FN_1_OUT); /* MMCCS0 */
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pxa2x0_gpio_set_function(53, GPIO_ALT_FN_1_OUT); /* MMCCLK */
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#if 0
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/* this configuration set by gxmci.c::pxamci_attach() */
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pxa2x0_gpio_set_function(11, GPIO_IN); /* nSD_DETECT */
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pxa2x0_gpio_set_function(22, GPIO_IN); /* nSD_WP */
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#endif
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}
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static void
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cfstix_config(void)
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{
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u_int gpio, npoe_fn;
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#if defined(CPU_XSCALE_PXA270) && defined(CPU_XSCALE_PXA250)
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int bvd = (CPU_IS_PXA250) ? 4 : 111;
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#else
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#if defined(CPU_XSCALE_PXA270)
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const int bvd = 111;
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#else
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const int bvd = 4;
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#endif
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#endif
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if (CPU_IS_PXA250) {
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gxpcic_slot_irqs[0].valid = 1;
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gxpcic_slot_irqs[0].cd = 11;
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gxpcic_slot_irqs[0].prdy = 26;
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gxpcic_gpio_reset = 8;
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} else {
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gxpcic_slot_irqs[0].valid = 1;
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gxpcic_slot_irqs[0].cd = 104;
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gxpcic_slot_irqs[0].prdy = 96;
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gxpcic_gpio_reset = 97;
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}
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#if 1
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/* PCD/PRDY set by pxa2x0_pcic.c::pxapcic_attach_common() */
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#else
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pxa2x0_gpio_set_function(11, GPIO_IN); /* PCD1 */
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pxa2x0_gpio_set_function(26, GPIO_IN); /* PRDY1/~IRQ1 */
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#endif
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pxa2x0_gpio_set_function(bvd, GPIO_IN); /* BVD1/~STSCHG1 */
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for (gpio = 48, npoe_fn = 0; gpio <= 53 ; gpio++)
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npoe_fn |= pxa2x0_gpio_get_function(gpio);
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npoe_fn &= GPIO_SET;
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pxa2x0_gpio_set_function(48, GPIO_ALT_FN_2_OUT | npoe_fn); /* nPOE */
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pxa2x0_gpio_set_function(49, GPIO_ALT_FN_2_OUT); /* nPWE */
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pxa2x0_gpio_set_function(50, GPIO_ALT_FN_2_OUT); /* nPIOR */
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pxa2x0_gpio_set_function(51, GPIO_ALT_FN_2_OUT); /* nPIOW */
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if (CPU_IS_PXA250) {
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pxa2x0_gpio_set_function(52, GPIO_ALT_FN_2_OUT); /* nPCE1 */
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pxa2x0_gpio_set_function(53, GPIO_ALT_FN_2_OUT); /* nPCE2 */
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pxa2x0_gpio_set_function(54, GPIO_ALT_FN_2_OUT); /* pSKTSEL */
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} else {
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pxa2x0_gpio_set_function(102, GPIO_ALT_FN_1_OUT); /* nPCE1 */
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pxa2x0_gpio_set_function(105, GPIO_ALT_FN_1_OUT); /* nPCE2 */
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pxa2x0_gpio_set_function(79, GPIO_ALT_FN_1_OUT); /* pSKTSEL */
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}
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pxa2x0_gpio_set_function(55, GPIO_ALT_FN_2_OUT); /* nPREG */
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pxa2x0_gpio_set_function(56, GPIO_ALT_FN_1_IN); /* nPWAIT */
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pxa2x0_gpio_set_function(57, GPIO_ALT_FN_1_IN); /* nIOIS16 */
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}
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static void
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etherstix_config(void)
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{
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extern struct cfdata cfdata[];
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#if defined(CPU_XSCALE_PXA270) && defined(CPU_XSCALE_PXA250)
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int rst = (CPU_IS_PXA250) ? 80 : 32;
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int irq = (CPU_IS_PXA250) ? 36 : 99;
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#else
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#if defined(CPU_XSCALE_PXA270)
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const int rst = 32, irq = 99;
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#else
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const int rst = 80, irq = 36;
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#endif
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#endif
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|
int i;
|
|
|
|
pxa2x0_gpio_set_function(49, GPIO_ALT_FN_2_OUT); /* nPWE */
|
|
pxa2x0_gpio_set_function(15, GPIO_ALT_FN_2_OUT); /* nCS 1 */
|
|
pxa2x0_gpio_set_function(rst, GPIO_OUT | GPIO_SET); /* RESET 1 */
|
|
delay(1);
|
|
pxa2x0_gpio_set_function(rst, GPIO_OUT | GPIO_CLR);
|
|
delay(50000);
|
|
|
|
for (i = 0; cfdata[i].cf_name != NULL; i++)
|
|
if (strcmp(cfdata[i].cf_name, "sm") == 0 &&
|
|
strcmp(cfdata[i].cf_atname, "sm_gxio") == 0 &&
|
|
cfdata[i].cf_loc[GXIOCF_ADDR] == 0x04000300 &&
|
|
cfdata[i].cf_loc[GXIOCF_GPIRQ] == GXIOCF_GPIRQ_DEFAULT)
|
|
cfdata[i].cf_loc[GXIOCF_GPIRQ] = irq;
|
|
}
|
|
|
|
static void
|
|
netcf_config(void)
|
|
{
|
|
|
|
etherstix_config();
|
|
cfstix_config();
|
|
}
|
|
|
|
static void
|
|
netcf_vx_config(void)
|
|
{
|
|
|
|
/*
|
|
* XXXX: More power is necessary for NIC and USB???
|
|
* (no document. from Linux)
|
|
*/
|
|
|
|
pxa2x0_gpio_set_function(27, GPIO_IN);
|
|
pxa2x0_gpio_set_function(107, GPIO_OUT | GPIO_CLR);
|
|
pxa2x0_gpio_set_function(118, GPIO_ALT_FN_1_IN | GPIO_CLR);
|
|
|
|
etherstix_config();
|
|
cfstix_config();
|
|
if (CPU_IS_PXA270) {
|
|
/* Overwrite */
|
|
gxpcic_slot_irqs[0].cd = 104;
|
|
gxpcic_slot_irqs[0].prdy = 109;
|
|
gxpcic_gpio_reset = 110;
|
|
};
|
|
}
|
|
|
|
static void
|
|
netduommc_config(void)
|
|
{
|
|
|
|
netduo_config();
|
|
basix_config();
|
|
}
|
|
|
|
static void
|
|
netduo_config(void)
|
|
{
|
|
|
|
etherstix_config();
|
|
|
|
pxa2x0_gpio_set_function(78, GPIO_ALT_FN_2_OUT); /* nCS 2 */
|
|
pxa2x0_gpio_set_function(52, GPIO_OUT | GPIO_SET); /* RESET 2 */
|
|
delay(1);
|
|
pxa2x0_gpio_set_function(52, GPIO_OUT | GPIO_CLR);
|
|
delay(50000);
|
|
}
|
|
|
|
static void
|
|
netmicrosd_config(void)
|
|
{
|
|
|
|
/* MicroSD(mci) always configure on PXA270 */
|
|
|
|
pxa2x0_gpio_set_function(49, GPIO_ALT_FN_2_OUT); /* nPWE */
|
|
pxa2x0_gpio_set_function(15, GPIO_ALT_FN_2_OUT); /* nCS 1 */
|
|
pxa2x0_gpio_set_function(107, GPIO_OUT | GPIO_CLR); /* RESET 1 */
|
|
delay(hz / 2);
|
|
pxa2x0_gpio_set_function(107, GPIO_OUT | GPIO_SET);
|
|
delay(50000);
|
|
}
|
|
|
|
static void
|
|
netwifimicrosd_config(void)
|
|
{
|
|
|
|
netmicrosd_config();
|
|
|
|
cfstix_config();
|
|
/* However use pxamci. */
|
|
pxa2x0_gpio_set_function(111, GPIO_CLR | GPIO_ALT_FN_1_IN);
|
|
/* Power to Marvell 88W8385 */
|
|
pxa2x0_gpio_set_function(80, GPIO_OUT | GPIO_SET);
|
|
}
|
|
|
|
static void
|
|
netmmc_config(void)
|
|
{
|
|
|
|
etherstix_config();
|
|
basix_config();
|
|
}
|
|
|
|
static void
|
|
wifistix_config(void)
|
|
{
|
|
|
|
cfstix_config();
|
|
|
|
/* Power to Marvell 88W8385 */
|
|
pxa2x0_gpio_set_function(80, GPIO_OUT | GPIO_SET);
|
|
}
|
|
|
|
static void
|
|
wifistix_cf_config(void)
|
|
{
|
|
|
|
gxpcic_slot_irqs[1].valid = 1;
|
|
gxpcic_slot_irqs[1].cd = 36;
|
|
gxpcic_slot_irqs[1].prdy = 27;
|
|
|
|
#if 1
|
|
/* this configuration set by pxa2x0_pcic.c::pxapcic_attach_common() */
|
|
#else
|
|
pxa2x0_gpio_set_function(36, GPIO_IN); /* PCD2 */
|
|
pxa2x0_gpio_set_function(27, GPIO_IN); /* PRDY2/~IRQ2 */
|
|
#endif
|
|
pxa2x0_gpio_set_function(18, GPIO_IN); /* BVD2/~STSCHG2 */
|
|
|
|
cfstix_config();
|
|
|
|
/* Power to Marvell 88W8385 */
|
|
pxa2x0_gpio_set_function(80, GPIO_OUT | GPIO_SET);
|
|
}
|
|
|
|
#elif defined(OVERO)
|
|
|
|
static void
|
|
eth0_config(void)
|
|
{
|
|
extern struct cfdata cfdata[];
|
|
cfdata_t cf = &cfdata[0];
|
|
|
|
/*
|
|
* ETH0 connects via CS5. It use GPIO 176 for IRQ.
|
|
* Also GPIO 64 is NRESET.
|
|
*
|
|
* Basically use current settings by U-Boot.
|
|
* However remap physical address to configured address.
|
|
*/
|
|
|
|
while (cf->cf_name != NULL) {
|
|
if (strcmp(cf->cf_name, "smsh") == 0 &&
|
|
cf->cf_loc[GPMCCF_INTR] == PIC_MAXSOURCES + 176)
|
|
break;
|
|
cf++;
|
|
}
|
|
if (cf->cf_name == NULL ||
|
|
cf->cf_loc[GPMCCF_ADDR] == GPMCCF_ADDR_DEFAULT)
|
|
return;
|
|
|
|
ioreg_write(OVERO_GPMC_VBASE + GPMC_CONFIG7_5,
|
|
GPMC_CONFIG7_CSVALID |
|
|
GPMC_CONFIG7(GPMC_CONFIG7_MASK_16M, cf->cf_loc[GPMCCF_ADDR]));
|
|
|
|
/*
|
|
* Maybe need NRESET and delay(9).
|
|
* However delay(9) needs to attach mputmr.
|
|
*/
|
|
}
|
|
|
|
static void
|
|
eth1_config(void)
|
|
{
|
|
extern struct cfdata cfdata[];
|
|
cfdata_t cf = &cfdata[0];
|
|
|
|
/*
|
|
* ETH1 connects via CS4. It use GPIO 65 for IRQ.
|
|
*
|
|
* Basically use current settings by U-Boot.
|
|
* However remap physical address to configured address.
|
|
*/
|
|
|
|
while (cf->cf_name != NULL) {
|
|
if (strcmp(cf->cf_name, "smsh") == 0 &&
|
|
cf->cf_loc[GPMCCF_INTR] == PIC_MAXSOURCES + 65)
|
|
break;
|
|
cf++;
|
|
}
|
|
if (cf->cf_name == NULL ||
|
|
cf->cf_loc[GPMCCF_ADDR] == GPMCCF_ADDR_DEFAULT)
|
|
return;
|
|
|
|
ioreg_write(OVERO_GPMC_VBASE + GPMC_CONFIG7_4,
|
|
GPMC_CONFIG7_CSVALID |
|
|
GPMC_CONFIG7(GPMC_CONFIG7_MASK_16M, cf->cf_loc[GPMCCF_ADDR]));
|
|
|
|
/* ETH1 is sure to be reset with ETH0. */
|
|
}
|
|
|
|
static void
|
|
chestnut_config(void)
|
|
{
|
|
|
|
eth0_config();
|
|
}
|
|
|
|
static void
|
|
tobi_config(void)
|
|
{
|
|
|
|
eth0_config();
|
|
}
|
|
|
|
static void
|
|
tobiduo_config(void)
|
|
{
|
|
|
|
eth0_config();
|
|
eth1_config();
|
|
}
|
|
#endif
|