259 lines
5.8 KiB
C
259 lines
5.8 KiB
C
/* $NetBSD: pci_2100_a50.c,v 1.25 1998/11/19 02:35:39 ross Exp $ */
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/*
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* Copyright (c) 1995, 1996 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: pci_2100_a50.c,v 1.25 1998/11/19 02:35:39 ross Exp $");
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/time.h>
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#include <sys/systm.h>
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#include <sys/errno.h>
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#include <sys/device.h>
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#include <vm/vm.h>
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#include <machine/autoconf.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <machine/intrcnt.h>
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#include <dev/isa/isavar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <alpha/pci/apecsvar.h>
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#include <alpha/pci/pci_2100_a50.h>
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#include <alpha/pci/siovar.h>
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#include <alpha/pci/sioreg.h>
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#include "sio.h"
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int dec_2100_a50_intr_map __P((void *, pcitag_t, int, int,
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pci_intr_handle_t *));
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const char *dec_2100_a50_intr_string __P((void *, pci_intr_handle_t));
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void *dec_2100_a50_intr_establish __P((void *, pci_intr_handle_t,
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int, int (*func)(void *), void *));
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void dec_2100_a50_intr_disestablish __P((void *, void *));
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#define APECS_SIO_DEVICE 7 /* XXX */
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void
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pci_2100_a50_pickintr(acp)
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struct apecs_config *acp;
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{
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bus_space_tag_t iot = &acp->ac_iot;
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pci_chipset_tag_t pc = &acp->ac_pc;
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pcireg_t sioclass;
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int sioII;
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/* XXX MAGIC NUMBER */
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sioclass = pci_conf_read(pc, pci_make_tag(pc, 0, 7, 0), PCI_CLASS_REG);
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sioII = (sioclass & 0xff) >= 3;
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if (!sioII)
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printf("WARNING: SIO NOT SIO II... NO BETS...\n");
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pc->pc_intr_v = acp;
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pc->pc_intr_map = dec_2100_a50_intr_map;
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pc->pc_intr_string = dec_2100_a50_intr_string;
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pc->pc_intr_establish = dec_2100_a50_intr_establish;
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pc->pc_intr_disestablish = dec_2100_a50_intr_disestablish;
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/* Not supported on 2100 A50. */
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pc->pc_pciide_compat_intr_establish = NULL;
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#if NSIO
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sio_intr_setup(pc, iot);
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set_iointr(&sio_iointr);
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#else
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panic("pci_2100_a50_pickintr: no I/O interrupt handler (no sio)");
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#endif
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}
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int
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dec_2100_a50_intr_map(acv, bustag, buspin, line, ihp)
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void *acv;
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pcitag_t bustag;
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int buspin, line;
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pci_intr_handle_t *ihp;
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{
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struct apecs_config *acp = acv;
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pci_chipset_tag_t pc = &acp->ac_pc;
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int device, pirq;
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pcireg_t pirqreg;
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u_int8_t pirqline;
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#ifndef DIAGNOSTIC
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pirq = 0; /* XXX gcc -Wuninitialized */
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#endif
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if (buspin == 0) {
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/* No IRQ used. */
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return 1;
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}
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if (buspin > 4) {
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printf("dec_2100_a50_intr_map: bad interrupt pin %d\n",
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buspin);
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return 1;
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}
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alpha_pci_decompose_tag(pc, bustag, NULL, &device, NULL);
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switch (device) {
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case 6: /* NCR SCSI */
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pirq = 3;
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break;
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case 11: /* slot 1 */
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case 14: /* slot 3 */
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switch (buspin) {
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case PCI_INTERRUPT_PIN_A:
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case PCI_INTERRUPT_PIN_D:
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pirq = 0;
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break;
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case PCI_INTERRUPT_PIN_B:
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pirq = 2;
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break;
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case PCI_INTERRUPT_PIN_C:
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pirq = 1;
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break;
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#ifdef DIAGNOSTIC
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default: /* XXX gcc -Wuninitialized */
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panic("dec_2100_a50_intr_map bogus PCI pin %d\n",
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buspin);
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#endif
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};
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break;
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case 12: /* slot 2 */
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switch (buspin) {
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case PCI_INTERRUPT_PIN_A:
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case PCI_INTERRUPT_PIN_D:
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pirq = 1;
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break;
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case PCI_INTERRUPT_PIN_B:
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pirq = 0;
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break;
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case PCI_INTERRUPT_PIN_C:
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pirq = 2;
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break;
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#ifdef DIAGNOSTIC
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default: /* XXX gcc -Wuninitialized */
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panic("dec_2100_a50_intr_map bogus PCI pin %d\n",
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buspin);
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#endif
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};
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break;
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case 13: /* slot 3 */
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switch (buspin) {
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case PCI_INTERRUPT_PIN_A:
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case PCI_INTERRUPT_PIN_D:
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pirq = 2;
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break;
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case PCI_INTERRUPT_PIN_B:
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pirq = 1;
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break;
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case PCI_INTERRUPT_PIN_C:
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pirq = 0;
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break;
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#ifdef DIAGNOSTIC
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default: /* XXX gcc -Wuninitialized */
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panic("dec_2100_a50_intr_map bogus PCI pin %d\n",
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buspin);
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#endif
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};
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break;
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default:
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printf("dec_2100_a50_intr_map: weird device number %d\n",
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device);
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return 1;
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}
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pirqreg = pci_conf_read(pc, pci_make_tag(pc, 0, APECS_SIO_DEVICE, 0),
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SIO_PCIREG_PIRQ_RTCTRL);
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#if 0
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printf("pci_2100_a50_intr_map: device %d pin %c: pirq %d, reg = %x\n",
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device, '@' + buspin, pirq, pirqreg);
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#endif
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pirqline = (pirqreg >> (pirq * 8)) & 0xff;
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if ((pirqline & 0x80) != 0)
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return 1;
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pirqline &= 0xf;
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#if 0
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printf("pci_2100_a50_intr_map: device %d pin %c: mapped to line %d\n",
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device, '@' + buspin, pirqline);
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#endif
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*ihp = pirqline;
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return (0);
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}
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const char *
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dec_2100_a50_intr_string(acv, ih)
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void *acv;
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pci_intr_handle_t ih;
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{
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#if 0
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struct apecs_config *acp = acv;
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#endif
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return sio_intr_string(NULL /*XXX*/, ih);
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}
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void *
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dec_2100_a50_intr_establish(acv, ih, level, func, arg)
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void *acv, *arg;
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pci_intr_handle_t ih;
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int level;
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int (*func) __P((void *));
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{
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#if 0
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struct apecs_config *acp = acv;
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#endif
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return sio_intr_establish(NULL /*XXX*/, ih, IST_LEVEL, level, func,
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arg);
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}
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void
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dec_2100_a50_intr_disestablish(acv, cookie)
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void *acv, *cookie;
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{
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#if 0
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struct apecs_config *acp = acv;
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#endif
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sio_intr_disestablish(NULL /*XXX*/, cookie);
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}
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