f6ab1073c8
* for the M68060 part: store buffer and branch target cache aren't
enabled yet (this needs cleanup of lots of locore.s code which is a
maze of little passages, all a little different) (and it wasn't yet
tested in an accellerated Amiga, only in the DraCo).
I've included a workaround for 2 of the CPU bugs in chips with Masks
1F43G and earlier, but didn't bother to deal with the can of worms
in the [0-3]D11W chips. Be sure to get "68060 rev. 1" or more
reported at kernel startup time, or at least mention it (or the mask
revision, if available) when reporting problems.
* for the DraCo: only machines with a CIA timer.
I assigned machine id 32000+nn (0x7Dnn), where n is the machine
readable Quicklogic custom chip revision (also printed at boot
time). "Guaranteed to work" up to rev. 3, newer DraCo's aren't
guaranteed to have any CIA (we don't have a driver for the new timer
yet).
Supported are:
- MF-II keyboards on the native interface and A3000 keyboards via
the CIA.
- builtin SCSI interface (yet another instance of siop)
- CIA timer.
- Zorro II devices which don't do DMA (don't get mapped to Zorro II
address space in the DraCo)
- "local bus" devices which are autoconfigured by the boot rom
(should be all); only an Altais driver is there (looks like a Retina Z3)
Not yet supported are:
- native timer of newer machines.
- Real Time Clock.
- serial, parallel + floppy on the SuperIO chip (that is also: no mouse)
XXX You need an enhanced boot loader, which will committed in a few days.
XXX std.draco should and will go away.
86 lines
3.2 KiB
C
86 lines
3.2 KiB
C
/* $NetBSD: mtpr.h,v 1.10 1996/05/09 20:31:53 is Exp $ */
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/*
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* Copyright (c) 1988 University of Utah.
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: Utah $Hdr: mtpr.h 1.1 90/07/09$
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*
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* @(#)mtpr.h 7.2 (Berkeley) 11/3/90
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*/
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#ifndef _MACHINE_MPTR_H_
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#define _MACHINE_MPTR_H_
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#ifdef _KERNEL
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/*
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* simulated software interrupt register (extends hardware
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* SOFTINT bit)
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*/
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/*
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* this makes it pretty machine dependant. Should this go into
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* <amiga/amiga/mtpr.h> ?
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*/
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#include <amiga/amiga/custom.h>
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#ifdef DRACO
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#include <amiga/amiga/drcustom.h>
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#endif
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extern unsigned char ssir;
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#define SIR_NET 0x1 /* call netintr */
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#define SIR_CLOCK 0x2 /* call softclock */
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#define SIR_CBACK 0x4 /* walk the sicallback-chain */
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#define siroff(x) ssir &= ~(x)
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#ifdef DRACO
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#define setsoftint() (is_draco()? (*draco_intfrc |= DRIRQ_SOFT) :\
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(custom.intreq = INTF_SETCLR|INTF_SOFTINT))
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#define clrsoftint() (is_draco()? (*draco_intfrc &= ~DRIRQ_SOFT) :\
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(custom.intreq = INTF_SOFTINT))
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#else
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#define setsoftint() (custom.intreq = INTF_SETCLR|INTF_SOFTINT)
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#define clrsoftint() (custom.intreq = INTF_SOFTINT)
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#endif
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#define setsoftnet() (ssir |= SIR_NET, setsoftint())
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#define setsoftclock() (ssir |= SIR_CLOCK, setsoftint())
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#define setsoftcback() (ssir |= SIR_CBACK, setsoftint())
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#endif /* _KERNEL */
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#endif /* !_MACHINE_MPTR_H_ */
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