460 lines
12 KiB
C
460 lines
12 KiB
C
/* $NetBSD: pci.c,v 1.58 2001/11/13 07:48:47 lukem Exp $ */
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/*
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* Copyright (c) 1995, 1996, 1997, 1998
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* Christopher G. Demetriou. All rights reserved.
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* Copyright (c) 1994 Charles M. Hannum. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Charles M. Hannum.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* PCI bus autoconfiguration.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: pci.c,v 1.58 2001/11/13 07:48:47 lukem Exp $");
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#include "opt_pci.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcidevs.h>
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#ifdef PCI_CONFIG_DUMP
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int pci_config_dump = 1;
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#else
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int pci_config_dump = 0;
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#endif
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int pcimatch __P((struct device *, struct cfdata *, void *));
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void pciattach __P((struct device *, struct device *, void *));
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struct cfattach pci_ca = {
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sizeof(struct pci_softc), pcimatch, pciattach
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};
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int pci_probe_bus(struct device *, int (*match)(struct pci_attach_args *),
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struct pci_attach_args *);
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int pciprint __P((void *, const char *));
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int pcisubmatch __P((struct device *, struct cfdata *, void *));
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/*
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* Important note about PCI-ISA bridges:
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*
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* Callbacks are used to configure these devices so that ISA/EISA bridges
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* can attach their child busses after PCI configuration is done.
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*
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* This works because:
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* (1) there can be at most one ISA/EISA bridge per PCI bus, and
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* (2) any ISA/EISA bridges must be attached to primary PCI
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* busses (i.e. bus zero).
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*
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* That boils down to: there can only be one of these outstanding
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* at a time, it is cleared when configuring PCI bus 0 before any
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* subdevices have been found, and it is run after all subdevices
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* of PCI bus 0 have been found.
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*
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* This is needed because there are some (legacy) PCI devices which
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* can show up as ISA/EISA devices as well (the prime example of which
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* are VGA controllers). If you attach ISA from a PCI-ISA/EISA bridge,
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* and the bridge is seen before the video board is, the board can show
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* up as an ISA device, and that can (bogusly) complicate the PCI device's
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* attach code, or make the PCI device not be properly attached at all.
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*
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* We use the generic config_defer() facility to achieve this.
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*/
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int
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pcimatch(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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struct pcibus_attach_args *pba = aux;
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if (strcmp(pba->pba_busname, cf->cf_driver->cd_name))
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return (0);
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/* Check the locators */
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if (cf->pcibuscf_bus != PCIBUS_UNK_BUS &&
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cf->pcibuscf_bus != pba->pba_bus)
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return (0);
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/* sanity */
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if (pba->pba_bus < 0 || pba->pba_bus > 255)
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return (0);
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/*
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* XXX check other (hardware?) indicators
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*/
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return 1;
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}
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/* XXX
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* The __PCI_BUS_DEVORDER/__PCI_DEV_FUNCORDER macros should go away
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* and be implemented with device properties when they arrive.
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*/
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int
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pci_probe_bus(struct device *self, int (*match)(struct pci_attach_args *),
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struct pci_attach_args *pap)
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{
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struct pci_softc *sc = (struct pci_softc *)self;
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bus_space_tag_t iot, memt;
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pci_chipset_tag_t pc;
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int bus, device, function, nfunctions, ret;
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#ifdef __PCI_BUS_DEVORDER
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char devs[32];
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int i;
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#endif
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#ifdef __PCI_DEV_FUNCORDER
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char funcs[8];
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int j;
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#else
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const struct pci_quirkdata *qd;
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#endif
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iot = sc->sc_iot;
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memt = sc->sc_memt;
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pc = sc->sc_pc;
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bus = sc->sc_bus;
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#ifdef __PCI_BUS_DEVORDER
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pci_bus_devorder(sc->sc_pc, sc->sc_bus, devs);
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for (i = 0; (device = devs[i]) < 32 && device >= 0; i++)
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#else
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for (device = 0; device < sc->sc_maxndevs; device++)
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#endif
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{
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pcitag_t tag;
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pcireg_t id, class, intr, bhlcr, csr;
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struct pci_attach_args pa;
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int pin;
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#ifdef __PCI_DEV_FUNCORDER
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pci_dev_funcorder(sc->sc_pc, sc->sc_bus, device, funcs);
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nfunctions = 8;
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#else
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tag = pci_make_tag(pc, bus, device, 0);
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id = pci_conf_read(pc, tag, PCI_ID_REG);
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/* Invalid vendor ID value? */
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if (PCI_VENDOR(id) == PCI_VENDOR_INVALID)
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continue;
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/* XXX Not invalid, but we've done this ~forever. */
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if (PCI_VENDOR(id) == 0)
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continue;
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qd = pci_lookup_quirkdata(PCI_VENDOR(id), PCI_PRODUCT(id));
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bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG);
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if (PCI_HDRTYPE_MULTIFN(bhlcr) ||
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(qd != NULL &&
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(qd->quirks & PCI_QUIRK_MULTIFUNCTION) != 0))
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nfunctions = 8;
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else
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nfunctions = 1;
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#endif /* __PCI_DEV_FUNCORDER */
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#ifdef __PCI_DEV_FUNCORDER
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for (j = 0; (function = funcs[j]) < nfunctions &&
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function >= 0; j++)
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#else
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for (function = 0; function < nfunctions; function++)
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#endif
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{
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tag = pci_make_tag(pc, bus, device, function);
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id = pci_conf_read(pc, tag, PCI_ID_REG);
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csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
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class = pci_conf_read(pc, tag, PCI_CLASS_REG);
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intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
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bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG);
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/* Invalid vendor ID value? */
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if (PCI_VENDOR(id) == PCI_VENDOR_INVALID)
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continue;
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/* XXX Not invalid, but we've done this ~forever. */
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if (PCI_VENDOR(id) == 0)
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continue;
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pa.pa_iot = iot;
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pa.pa_memt = memt;
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pa.pa_dmat = sc->sc_dmat;
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pa.pa_pc = pc;
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pa.pa_bus = bus;
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pa.pa_device = device;
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pa.pa_function = function;
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pa.pa_tag = tag;
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pa.pa_id = id;
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pa.pa_class = class;
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/*
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* Set up memory, I/O enable, and PCI command flags
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* as appropriate.
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*/
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pa.pa_flags = sc->sc_flags;
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if ((csr & PCI_COMMAND_IO_ENABLE) == 0)
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pa.pa_flags &= ~PCI_FLAGS_IO_ENABLED;
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if ((csr & PCI_COMMAND_MEM_ENABLE) == 0)
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pa.pa_flags &= ~PCI_FLAGS_MEM_ENABLED;
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/*
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* If the cache line size is not configured, then
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* clear the MRL/MRM/MWI command-ok flags.
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*/
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if (PCI_CACHELINE(bhlcr) == 0)
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pa.pa_flags &= ~(PCI_FLAGS_MRL_OKAY|
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PCI_FLAGS_MRM_OKAY|PCI_FLAGS_MWI_OKAY);
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if (bus == 0) {
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pa.pa_intrswiz = 0;
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pa.pa_intrtag = tag;
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} else {
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pa.pa_intrswiz = sc->sc_intrswiz + device;
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pa.pa_intrtag = sc->sc_intrtag;
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}
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pin = PCI_INTERRUPT_PIN(intr);
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if (pin == PCI_INTERRUPT_PIN_NONE) {
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/* no interrupt */
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pa.pa_intrpin = 0;
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} else {
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/*
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* swizzle it based on the number of
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* busses we're behind and our device
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* number.
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*/
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pa.pa_intrpin = /* XXX */
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((pin + pa.pa_intrswiz - 1) % 4) + 1;
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}
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pa.pa_intrline = PCI_INTERRUPT_LINE(intr);
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if (match != NULL) {
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ret = match(&pa);
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if (ret != 0) {
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if (pap != NULL)
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*pap = pa;
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return ret;
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}
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} else {
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config_found_sm(self, &pa, pciprint,
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pcisubmatch);
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}
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}
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}
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return 0;
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}
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void
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pciattach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct pcibus_attach_args *pba = aux;
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struct pci_softc *sc = (struct pci_softc *)self;
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int io_enabled, mem_enabled, mrl_enabled, mrm_enabled, mwi_enabled;
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const char *sep = "";
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pci_attach_hook(parent, self, pba);
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printf("\n");
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io_enabled = (pba->pba_flags & PCI_FLAGS_IO_ENABLED);
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mem_enabled = (pba->pba_flags & PCI_FLAGS_MEM_ENABLED);
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mrl_enabled = (pba->pba_flags & PCI_FLAGS_MRL_OKAY);
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mrm_enabled = (pba->pba_flags & PCI_FLAGS_MRM_OKAY);
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mwi_enabled = (pba->pba_flags & PCI_FLAGS_MWI_OKAY);
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if (io_enabled == 0 && mem_enabled == 0) {
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printf("%s: no spaces enabled!\n", self->dv_xname);
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return;
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}
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#define PRINT(s) do { printf("%s%s", sep, s); sep = ", "; } while (0)
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printf("%s: ", self->dv_xname);
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if (io_enabled)
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PRINT("i/o space");
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if (mem_enabled)
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PRINT("memory space");
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printf(" enabled");
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if (mrl_enabled || mrm_enabled || mwi_enabled) {
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if (mrl_enabled)
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PRINT("rd/line");
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if (mrm_enabled)
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PRINT("rd/mult");
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if (mwi_enabled)
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PRINT("wr/inv");
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printf(" ok");
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}
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printf("\n");
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#undef PRINT
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sc->sc_iot = pba->pba_iot;
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sc->sc_memt = pba->pba_memt;
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sc->sc_dmat = pba->pba_dmat;
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sc->sc_pc = pba->pba_pc;
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sc->sc_bus = pba->pba_bus;
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sc->sc_maxndevs = pci_bus_maxdevs(pba->pba_pc, pba->pba_bus);
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sc->sc_intrswiz = pba->pba_intrswiz;
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sc->sc_intrtag = pba->pba_intrtag;
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sc->sc_flags = pba->pba_flags;
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pci_probe_bus(self, NULL, NULL);
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}
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int
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pciprint(aux, pnp)
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void *aux;
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const char *pnp;
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{
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struct pci_attach_args *pa = aux;
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char devinfo[256];
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const struct pci_quirkdata *qd;
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if (pnp) {
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pci_devinfo(pa->pa_id, pa->pa_class, 1, devinfo);
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printf("%s at %s", devinfo, pnp);
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}
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printf(" dev %d function %d", pa->pa_device, pa->pa_function);
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if (pci_config_dump) {
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printf(": ");
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pci_conf_print(pa->pa_pc, pa->pa_tag, NULL);
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if (!pnp)
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pci_devinfo(pa->pa_id, pa->pa_class, 1, devinfo);
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printf("%s at %s", devinfo, pnp ? pnp : "?");
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printf(" dev %d function %d (", pa->pa_device, pa->pa_function);
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#ifdef __i386__
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printf("tag %#lx, intrtag %#lx, intrswiz %#lx, intrpin %#lx",
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*(long *)&pa->pa_tag, *(long *)&pa->pa_intrtag,
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(long)pa->pa_intrswiz, (long)pa->pa_intrpin);
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#else
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printf("intrswiz %#lx, intrpin %#lx",
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(long)pa->pa_intrswiz, (long)pa->pa_intrpin);
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#endif
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printf(", i/o %s, mem %s,",
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pa->pa_flags & PCI_FLAGS_IO_ENABLED ? "on" : "off",
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pa->pa_flags & PCI_FLAGS_MEM_ENABLED ? "on" : "off");
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qd = pci_lookup_quirkdata(PCI_VENDOR(pa->pa_id),
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PCI_PRODUCT(pa->pa_id));
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if (qd == NULL) {
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printf(" no quirks");
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} else {
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bitmask_snprintf(qd->quirks,
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"\20\1multifn", devinfo, sizeof (devinfo));
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printf(" quirks %s", devinfo);
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}
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printf(")");
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}
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return (UNCONF);
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}
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int
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pcisubmatch(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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struct pci_attach_args *pa = aux;
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if (cf->pcicf_dev != PCI_UNK_DEV &&
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cf->pcicf_dev != pa->pa_device)
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return 0;
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if (cf->pcicf_function != PCI_UNK_FUNCTION &&
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cf->pcicf_function != pa->pa_function)
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return 0;
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return ((*cf->cf_attach->ca_match)(parent, cf, aux));
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}
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int
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pci_get_capability(pc, tag, capid, offset, value)
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pci_chipset_tag_t pc;
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pcitag_t tag;
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int capid;
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int *offset;
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pcireg_t *value;
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{
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pcireg_t reg;
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unsigned int ofs;
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reg = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
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if (!(reg & PCI_STATUS_CAPLIST_SUPPORT))
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return (0);
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/* Determine the Capability List Pointer register to start with. */
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reg = pci_conf_read(pc, tag, PCI_BHLC_REG);
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switch (PCI_HDRTYPE_TYPE(reg)) {
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case 0: /* standard device header */
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ofs = PCI_CAPLISTPTR_REG;
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break;
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case 2: /* PCI-CardBus Bridge header */
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ofs = PCI_CARDBUS_CAPLISTPTR_REG;
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break;
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default:
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return (0);
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}
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ofs = PCI_CAPLIST_PTR(pci_conf_read(pc, tag, ofs));
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while (ofs != 0) {
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#ifdef DIAGNOSTIC
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if ((ofs & 3) || (ofs < 0x40))
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panic("pci_get_capability");
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#endif
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reg = pci_conf_read(pc, tag, ofs);
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if (PCI_CAPLIST_CAP(reg) == capid) {
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if (offset)
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*offset = ofs;
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if (value)
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*value = reg;
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return (1);
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}
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ofs = PCI_CAPLIST_NEXT(reg);
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}
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return (0);
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}
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int
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pci_find_device(struct pci_attach_args *pa,
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int (*match)(struct pci_attach_args *))
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{
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int i;
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struct device *pcidev;
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extern struct cfdriver pci_cd;
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for (i = 0; i < pci_cd.cd_ndevs; i++) {
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pcidev = pci_cd.cd_devs[i];
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if (pcidev != NULL && pci_probe_bus(pcidev, match, pa) != 0)
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return 1;
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}
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return 0;
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}
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