b0e76afee4
- Moved the audio files that are VIDC dependant from the mainbus
directory to the vidc directory. (revision history preserved)
144 lines
3.7 KiB
ArmAsm
144 lines
3.7 KiB
ArmAsm
/* $NetBSD: lmc1982.S,v 1.2 1997/10/14 12:03:14 mark Exp $ */
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/*
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* Copyright (c) 1996, Danny C Tsen.
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* Copyright (c) 1996, VLSI Technology Inc. All Rights Reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Michael L. Hitch.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* NS LMC1982, Stereo and volume control.
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*/
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#include <machine/asm.h>
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#include <arm32/iomd/iomdreg.h>
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#include <arm32/mainbus/lmc1982.h>
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/*
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* r0=address
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* r1=value
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* r2 control IOCR
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* r3=control FREQCON
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* r4 timeout
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* r5 FREQimage
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* r6 FREQCON
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* r7 IOCBase (IOCR address)
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* r4, r8 scratch
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*/
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ENTRY(volume_ctl)
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stmfd sp!, {r0-r8, lr}
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/*
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* operate the volume control circuit
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*/
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mov r7, #(IOMD_BASE)
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add r6, r7, #(FREQCON << 2) /* location of FREQCON register */
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ldr r5, Lvfreqcon /* frequency reg shadow */
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orr r0,r0,#0x40 /* chip address adder */
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ldrb r2,[r7] /* get IOCR value */
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orr r2,r2,#IOCR_AUDIO /*insure data is high*/
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strb r2,[r7]
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mov r4,#8
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ldrb r3,[r5] /* get freqcon */
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orr r3,r3,#(LID | LCLOCK) /* ID and CLOCK high */
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strb r3,[r6]
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mov r4,#10
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bl _waitabit /* wait 10 usec */
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bic r3,r3,#(LID)
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strb r3,[r6] /* lower ID bit */
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bl _shift
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orr r3,r3,#(LID | LCLOCK) /* ID and CLOCK high */
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strb r3,[r6]
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mov r0,r1
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bl _shift
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mov r4,#10
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bl _waitabit /* wait 10 usec */
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bic r3,r3,#(LID)
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strb r3,[r6] /* lower ID bit */
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mov r4,#1
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bl _waitabit /* wait 1 usec */
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orr r3,r3,#(LID | LCLOCK) /* ID and CLOCK high */
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strb r3,[r6]
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ldmfd sp!, {r0-r8, pc}
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Lvfreqcon:
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.word _vfreqcon
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_shift: /* data in r0 */
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mov r4,#8 /* number of bits in address */
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sloop:
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bic r3,r3,#(LCLOCK)
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strb r3,[r6] /* lower CLOCK bit */
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movs r0,r0,LSR #1 /* get bit */
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orrcs r2,r2,#IOCR_AUDIO /* insure data is high */
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biccc r2,r2,#IOCR_AUDIO /* insure data is low */
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strb r2,[r7]
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orr r3,r3,#(LCLOCK)
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strb r3,[r6] /* raise CLOCK bit */
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subs r4,r4,#1
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bne sloop
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mov pc,lr
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_waitabit:
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mov r8,#15
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wloop:
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subs r8,r8,#1
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bne wloop
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subs r4,r4,#1
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bne _waitabit
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mov pc,lr
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/*
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* r0: addr
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* r1: counter
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*/
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ENTRY(conv_jap)
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stmfd sp!, {r2-r4, lr}
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movs r2, r1 /* counter */
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beq conv_jap_end
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cloop:
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ldrb r3, [r0]
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eor r3, r3, #0x80
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strb r3, [r0], #1
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subs r2, r2, #1
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bne cloop
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conv_jap_end:
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ldmfd sp!, {r2-r4, pc}
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