9b4c0e34d2
x86-64. Since there's no hardware available yet, this port is only known to run on the Simics simulator for at the moment, and as such uses the PC devices that it simulates for now. It will be developed more (and cleaned up) as the hardware becomes available.
50 lines
1.5 KiB
C
50 lines
1.5 KiB
C
/* $NetBSD: kcore.h,v 1.1 2001/06/19 00:20:11 fvdl Exp $ */
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/*
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* Copyright (c) 1996 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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/*
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* Modified for NetBSD/i386 by Jason R. Thorpe, Numerical Aerospace
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* Simulation Facility, NASA Ames Research Center.
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*
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* And once again modified for x86-64 by Frank van der Linden of
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* Wasabi Systems, Inc.
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*/
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#ifndef _X86_64KCORE_H_
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#define _X86_64_KCORE_H_
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typedef struct cpu_kcore_hdr {
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u_int64_t ptdpaddr; /* PA of PML4 */
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u_int64_t nmemsegs; /* Number of RAM segments */
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#if 0
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phys_ram_seg_t memsegs[]; /* RAM segments */
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#endif
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} cpu_kcore_hdr_t;
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#endif /* _X86_64_KCORE_H_ */
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