258 lines
7.3 KiB
C
258 lines
7.3 KiB
C
/* $NetBSD: irongate.c,v 1.10 2003/01/01 00:39:20 thorpej Exp $ */
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/*-
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* Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "opt_api_up1000.h"
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: irongate.c,v 1.10 2003/01/01 00:39:20 thorpej Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <machine/autoconf.h>
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#include <machine/rpb.h>
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#include <machine/sysarch.h>
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#include <dev/isa/isareg.h>
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#include <dev/isa/isavar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/agpvar.h>
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#include <alpha/pci/irongatereg.h>
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#include <alpha/pci/irongatevar.h>
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#ifdef API_UP1000
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#include <alpha/pci/pci_up1000.h>
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#endif
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int irongate_match(struct device *, struct cfdata *, void *);
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void irongate_attach(struct device *, struct device *, void *);
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CFATTACH_DECL(irongate, sizeof(struct irongate_softc),
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irongate_match, irongate_attach, NULL, NULL);
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int irongate_print(void *, const char *pnp);
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extern struct cfdriver irongate_cd;
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/* There can be only one. */
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struct irongate_config irongate_configuration;
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int irongate_found;
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int irongate_bus_get_window(int, int,
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struct alpha_bus_space_translation *);
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/*
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* Set up the chipset's function pointers.
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*/
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void
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irongate_init(struct irongate_config *icp, int mallocsafe)
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{
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pcitag_t tag;
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pcireg_t reg;
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icp->ic_mallocsafe = mallocsafe;
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/*
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* Set up PCI configuration space; we can only read the
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* revision info through configuration space.
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*/
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irongate_pci_init(&icp->ic_pc, icp);
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alpha_pci_chipset = &icp->ic_pc;
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tag = pci_make_tag(&icp->ic_pc, 0, IRONGATE_PCIHOST_DEV, 0);
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/* Read the revision. */
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reg = irongate_conf_read0(icp, tag, PCI_CLASS_REG);
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icp->ic_rev = PCI_REVISION(reg);
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if (icp->ic_initted == 0) {
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/* Don't do these twice, since they set up extents. */
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irongate_bus_io_init(&icp->ic_iot, icp);
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irongate_bus_mem_init(&icp->ic_memt, icp);
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/* Only one each PCI I/O and MEM window. */
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alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_IO] = 1;
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alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_MEM] = 1;
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alpha_bus_get_window = irongate_bus_get_window;
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}
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icp->ic_initted = 1;
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}
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int
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irongate_match(struct device *parent, struct cfdata *match, void *aux)
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{
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struct mainbus_attach_args *ma = aux;
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/* Make sure we're looking for an Irongate. */
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if (strcmp(ma->ma_name, irongate_cd.cd_name) != 0)
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return (0);
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if (irongate_found)
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return (0);
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return (1);
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}
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void
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irongate_attach(struct device *parent, struct device *self, void *aux)
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{
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struct irongate_softc *sc = (void *) self;
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struct irongate_config *icp;
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struct pcibus_attach_args pba;
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struct agpbus_attach_args apa;
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pcitag_t tag;
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/* Note that we've attached the chipset; can't have 2 Irongates. */
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irongate_found = 1;
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/*
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* Set up the chipset's info; done once at console init time
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* (maybe), but we must do it here as well to take care of things
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* that need to use memory allocation.
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*/
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icp = sc->sc_icp = &irongate_configuration;
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irongate_init(icp, 1);
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printf(": AMD 751 Core Logic + AGP Chipset, rev. %d\n", icp->ic_rev);
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irongate_dma_init(icp);
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/*
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* Do PCI memory initialization that needs to be deferred until
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* malloc is safe.
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*/
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irongate_bus_mem_init2(&icp->ic_memt, icp);
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switch (cputype) {
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#ifdef API_UP1000
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case ST_API_NAUTILUS:
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pci_up1000_pickintr(icp);
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break;
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#endif
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default:
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panic("irongate_attach: shouldn't be here, really...");
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}
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tag = pci_make_tag(&icp->ic_pc, 0, IRONGATE_PCIHOST_DEV, 0);
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pba.pba_busname = "pci";
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pba.pba_iot = &icp->ic_iot;
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pba.pba_memt = &icp->ic_memt;
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pba.pba_dmat =
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alphabus_dma_get_tag(&icp->ic_dmat_pci, ALPHA_BUS_PCI);
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pba.pba_pc = &icp->ic_pc;
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pba.pba_bus = 0;
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pba.pba_bridgetag = NULL;
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pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED |
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PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY | PCI_FLAGS_MWI_OKAY;
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if (pci_get_capability(&icp->ic_pc, tag, PCI_CAP_AGP,
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NULL, NULL) != 0) {
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apa.apa_busname = "agp";
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apa.apa_pci_args.pa_iot = pba.pba_iot;
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apa.apa_pci_args.pa_memt = pba.pba_memt;
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apa.apa_pci_args.pa_dmat = pba.pba_dmat;
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apa.apa_pci_args.pa_pc = pba.pba_pc;
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apa.apa_pci_args.pa_bus = pba.pba_bus;
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apa.apa_pci_args.pa_device = IRONGATE_PCIHOST_DEV;
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apa.apa_pci_args.pa_function = 0;
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apa.apa_pci_args.pa_tag = tag;
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apa.apa_pci_args.pa_id =
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irongate_conf_read0(icp, tag, PCI_ID_REG);
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apa.apa_pci_args.pa_class =
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irongate_conf_read0(icp, tag, PCI_CLASS_REG);
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apa.apa_pci_args.pa_flags = pba.pba_flags;
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(void) config_found(self, &apa, irongate_print);
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}
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(void) config_found(self, &pba, irongate_print);
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}
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int
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irongate_print(void *aux, const char *pnp)
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{
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struct pcibus_attach_args *pba = aux;
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/* Only PCIs can attach to Irongates; easy. */
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if (pnp != NULL)
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aprint_normal("%s at %s", pba->pba_busname, pnp);
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if (strcmp(pba->pba_busname, "pci") == 0)
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aprint_normal(" bus %d", pba->pba_bus);
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return (UNCONF);
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}
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int
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irongate_bus_get_window(int type, int window,
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struct alpha_bus_space_translation *abst)
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{
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struct irongate_config *icp = &irongate_configuration;
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bus_space_tag_t st;
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int error;
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switch (type) {
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case ALPHA_BUS_TYPE_PCI_IO:
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st = &icp->ic_iot;
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break;
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case ALPHA_BUS_TYPE_PCI_MEM:
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st = &icp->ic_memt;
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break;
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default:
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panic("irongate_bus_get_window");
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}
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error = alpha_bus_space_get_window(st, window, abst);
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if (error)
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return (error);
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abst->abst_sys_start = IRONGATE_PHYSADDR(abst->abst_sys_start);
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abst->abst_sys_end = IRONGATE_PHYSADDR(abst->abst_sys_end);
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return (0);
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}
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