8067595564
in arch/shark. (NOTE: arch/dnard, a premature move to split out the Shark support code, is going to be deleted. It has bit-rotted.)
157 lines
5.5 KiB
C
157 lines
5.5 KiB
C
/* $NetBSD: irqhandler.h,v 1.1 2002/02/10 01:57:23 thorpej Exp $ */
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/*
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* Copyright (c) 1994-1996 Mark Brinicombe.
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* Copyright (c) 1994 Brini.
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* All rights reserved.
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*
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* This code is derived from software written for Brini by Mark Brinicombe
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Mark Brinicombe
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* for the NetBSD Project.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* IRQ related stuff (defines + structures)
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*
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* Created : 30/09/94
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*/
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#ifndef _ARM32_IRQHANDLER_H_
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#define _ARM32_IRQHANDLER_H_
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#ifndef _LOCORE
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#include <sys/types.h>
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#endif /* _LOCORE */
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/* Define the IRQ bits */
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/*
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* XXX this is really getting rather horrible.
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* Shortly to be replaced with system specific interrupt tables and handling
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*/
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#ifdef OFWGENCFG
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/* These are just made up for now! -JJK */
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#define IRQ_TIMER0 0
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#endif
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#ifdef SHARK
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/*
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* shark hardware requirements for IRQ's:
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* IDE: 14 (hardwired)
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* PCI: 5, 9, 10, 11, 15(mapped to UMIPCI inta, intb, intc, intd)
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* UMIISA: 10, 11, 12
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* SuperIO: 1, 3..12, 14, 15(all may be remapped. defaults as follows.)
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* KBC: 1
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* USI: 3 (UART with Slow Infrared support)
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* UART: 4
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* FLOPPY: 6 (not currently used on shark)
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* PARALLEL: 7
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* RTC: 8 (not used on shark: RTC in sequoia used)
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* MOUSE: 12
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* Sequoia: 8 (internal RTC hardwired to irq 8)
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* Codec: 5, 7, 9, 10, 15 (irqe, connected to 15, has special status.)
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* CS8900: 5, 10, 11, 12 (P.14 of datasheet sez only 1 used/time)
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* FERR#: 13 (unconnected floating point error)
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*
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* total of 15 irqs:
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* timer, ide, 2 umi = isa/pci, ethernet, 2 codec, kb, usi, uart, floppy,
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* parallel, rtc, mouse, ferr (irq 13)
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*
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* eventually, need to read the OFW dev info tree, and allocate IRQs.
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* hardcoded for now.
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*/
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#define IRQ_TIMER0 0x00 /* hardwired to 8254 counter 0 in sequoia */
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#define IRQ_KEYBOARD 0x01
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#define IRQ_CASCADE 0x02 /* hardwired IRQ for second 8259 = IRQ_SLAVE */
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#define IRQ_USI 0x03
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#define IRQ_UART 0x04
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#define IRQ_ETHERNET 0x05
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#define IRQ_FLOPPY 0x06
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#define IRQ_PARALLEL 0x07
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#define IRQ_RTC 0x08 /* hardwired to the sequoia RTC */
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#define IRQ_CODEC1 0x09
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#define IRQ_UMI1 0x0A /* isa or pci */
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#define IRQ_UMI2 0x0B /* isa or pci */
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#define IRQ_MOUSE 0x0C
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#define IRQ_FERR 0x0D /* FERR# pin on sequoia needs to be connected */
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#define IRQ_IDE 0x0E /* hardwired to the IDE connector */
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#define IRQ_CODEC2 0x0F /* special interrupt on codec */
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/* XXX should this go into isa_machdep.h. Somewhere else? */
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/* Interrupt sharing types. */
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#define IST_NONE 0 /* none */
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#define IST_PULSE 1 /* pulsed */
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#define IST_EDGE 2 /* edge-triggered */
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#define IST_LEVEL 3 /* level-triggered */
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#endif /* SHARK */
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#define IRQ_VSYNC IRQ_FLYBACK /* Aliased */
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#define IRQ_NETSLOT IRQ_EXTENDED
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#define IRQ_INSTRUCT -1
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#define NIRQS 0x20
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#include <machine/intr.h>
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#ifndef _LOCORE
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typedef struct irqhandler {
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int (*ih_func) __P((void *arg));/* handler function */
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void *ih_arg; /* Argument to handler */
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int ih_level; /* Interrupt level */
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int ih_num; /* Interrupt number (for accounting) */
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const char *ih_name; /* Name of interrupt (for vmstat -i) */
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u_int ih_flags; /* Interrupt flags */
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u_int ih_maskaddr; /* mask address for expansion cards */
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u_int ih_maskbits; /* interrupt bit for expansion cards */
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struct irqhandler *ih_next; /* next handler */
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} irqhandler_t;
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#ifdef _KERNEL
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extern u_int irqmasks[IPL_LEVELS];
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extern irqhandler_t *irqhandlers[NIRQS];
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void irq_init __P((void));
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int irq_claim __P((int, irqhandler_t *));
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int irq_release __P((int, irqhandler_t *));
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void *intr_claim __P((int irq, int level, const char *name, int (*func) __P((void *)), void *arg));
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int intr_release __P((void *ih));
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void irq_setmasks __P((void));
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void disable_irq __P((int));
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void enable_irq __P((int));
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#endif /* _KERNEL */
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#endif /* _LOCORE */
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#define IRQ_FLAG_ACTIVE 0x00000001 /* This is the active handler in list */
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#endif /* _ARM32_IRQHANDLER_H_ */
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/* End of irqhandler.h */
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