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which holds state of the MCPCIA to which the console is attached. - All MCPCIA info is now stored in the mcpcia_config structure; the mcpcia_softc only contains a struct device and a pointer to one of these. - If attaching the console MCPCIA, use the static configuration, else allocate the substructure. - Rename mcpcia_init() to mcpcia_init0(), and make it take a "mallocsafe" argument. - Implement a new mcpcia_init(), which looks for the MCPCIA which has the EISA bridge attached. Initialize this MCPCIA as the console MCPCIA (the console on the Rawhide is only allowed on this MCPCIA; firmware rule). - Eliminate the kludgy linked listed of mcpcia_softcs. Just use mcpcia_cd to find all configured instances. Separate bug fix: Actually clear the MCPCIA error mask after probing for PCI (and ISA) devices, don't just clear it twice in mcpcia_init0(). Some other slight cleanup.
108 lines
3.6 KiB
C
108 lines
3.6 KiB
C
/* $NetBSD: mcpciavar.h,v 1.3 1999/04/15 22:27:40 thorpej Exp $ */
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/*
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* Copyright (c) 1998 by Matthew Jacob
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* NASA AMES Research Center.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice immediately at the beginning of the file, without modification,
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* this list of conditions, and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <dev/pci/pcivar.h>
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#include <sys/extent.h>
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#include <alpha/pci/pci_sgmap_pte64.h>
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#define _FSTORE (EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long))
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/*
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* MPCIA configuration.
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*/
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struct mcpcia_config {
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int cc_gid; /* GID of this MCbus */
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int cc_mid; /* MCbus Module ID */
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int cc_initted;
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int cc_mallocsafe;
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struct alpha_bus_space cc_iot;
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struct alpha_bus_space cc_memt;
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struct extent * cc_io_ex;
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struct extent * cc_d_mem_ex;
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struct extent * cc_s_mem_ex;
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struct alpha_pci_chipset cc_pc;
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struct mcpcia_softc * cc_sc; /* back pointer */
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long cc_io_exstorage[_FSTORE];
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long cc_dmem_exstorage[_FSTORE];
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long cc_smem_exstorage[_FSTORE];
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unsigned long cc_sysbase; /* shorthand */
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struct alpha_bus_dma_tag cc_dmat_direct;
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struct alpha_bus_dma_tag cc_dmat_sgmap;
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struct alpha_sgmap cc_sgmap;
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};
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struct mcpcia_softc {
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struct device mcpcia_dev;
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struct mcpcia_config *mcpcia_cc; /* config info */
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};
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void mcpcia_init __P((void));
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void mcpcia_config_cleanup __P((void));
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void mcpcia_pci_init __P((pci_chipset_tag_t, void *));
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void mcpcia_dma_init __P((struct mcpcia_config *));
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void mcpcia_bus_io_init __P((bus_space_tag_t, void *));
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void mcpcia_bus_mem_init __P((bus_space_tag_t, void *));
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/*
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* IO Interrupt handler.
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*/
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void mcpcia_iointr __P((void *, unsigned long));
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/*
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* There are four PCI slots per MCPCIA PCI bus here, but some are 'hidden'-
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* none seems to be higher than 6 though.
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*/
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#define MCPCIA_MAXDEV 6
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#define MCPCIA_MAXSLOT 8
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/*
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* Interrupt Stuff for MCPCIA systems.
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*
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* EISA interrupts (at vector 0x800) have to be shared interrupts-
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* and that can be easily managed. All the PCI interrupts are deterministic
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* in that they start at vector 0x900, 0x40 per PCI slot, 0x200 per
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* MCPCIA, 4 MCPCIAs per GCBUS....
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*/
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#define MCPCIA_EISA_KEYB_IRQ 1
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#define MCPCIA_EISA_MOUSE_IRQ 12
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#define MCPCIA_VEC_EISA 0x800
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#define MCPCIA_VEC_PCI 0x900
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/*
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* Special Vectors
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*/
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#define MCPCIA_I2C_CVEC 0xA90
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#define MCPCIA_I2C_BVEC 0xAA0
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