bjh21 b959cd4c1f Re-organise eca(4)'s FIQ handlers. Now we have a single FIQ handler copied ... to zero page, and it branches to either the rx or tx handler. My intention is that the tx handler should switch to the rx one the moment it finishes, without needing a downgrade, which I hope will get rid of the start-of-frame rx overruns I'm seeing. While I'm here, move the constants describing the shape of the FIQ state structures out of if_ecavar.h and into genassym.cf where they belong.		2001-09-20 21:54:11 +00:00
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arm26	Re-organise eca(4)'s FIQ handlers. Now we have a single FIQ handler copied	2001-09-20 21:54:11 +00:00
compile	…
conf	Re-organise eca(4)'s FIQ handlers. Now we have a single FIQ handler copied	2001-09-20 21:54:11 +00:00
include	Add a minimal bus_space_mmap which always fails. The MEMC can only map DRAM	2001-09-11 11:38:59 +00:00
iobus	In ioc_attach(), use ioc_irq_setmask() and ioc_fiq_setmask() rather than	2001-08-25 17:59:38 +00:00
ioc	Re-organise eca(4)'s FIQ handlers. Now we have a single FIQ handler copied	2001-09-20 21:54:11 +00:00
podulebus	Use int_off_save and int_restore rather than int_off and int_on.	2001-08-20 23:28:05 +00:00
stand	Bump version for * command addition.	2001-08-03 00:41:12 +00:00
vidc	Also make it return something. See, Ben, you _do_ need to test every change.	2001-06-30 16:20:37 +00:00
Makefile	…