22 lines
835 B
C
22 lines
835 B
C
/* $NetBSD: dmareg.h,v 1.3 1995/01/29 02:58:25 cgd Exp $ */
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#include <dev/ic/i8237.h>
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/*
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* Register definitions for DMA controller 1 (channels 0..3):
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*/
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#define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */
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#define DMA1_SR (IO_DMA1 + 1*8) /* status register */
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#define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */
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#define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */
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#define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */
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/*
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* Register definitions for DMA controller 2 (channels 4..7):
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*/
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#define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */
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#define DMA2_SR (IO_DMA2 + 2*8) /* status register */
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#define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */
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#define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */
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#define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */
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