325 lines
10 KiB
C
325 lines
10 KiB
C
/* $NetBSD: pciide.c,v 1.3 1998/03/04 19:19:21 cgd Exp $ */
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/*
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* Copyright (c) 1996, 1998 Christopher G. Demetriou. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Christopher G. Demetriou
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* for the NetBSD Project.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* PCI IDE controller driver.
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*
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* Author: Christopher G. Demetriou, March 2, 1998 (derived from NetBSD
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* sys/dev/pci/ppb.c, revision 1.16).
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*
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* See "PCI IDE Controller Specification, Revision 1.0 3/4/94" and
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* "Programming Interface for Bus Master IDE Controller, Revision 1.0
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* 5/16/94" from the PCI SIG.
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*
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* XXX Does not yet support DMA (but does map the Bus Master DMA regs).
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*
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* XXX Does not support serializing the two channels for broken (at least
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* XXX according to linux and freebsd) controllers, e.g. CMD PCI0640.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pciidereg.h>
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#include <dev/pci/pciidevar.h>
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struct pciide_softc {
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struct device sc_dev;
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void *sc_pci_ih; /* PCI interrupt handle */
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int sc_dma_ioh_valid; /* bus-master DMA info */
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bus_space_tag_t sc_dma_iot;
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bus_space_handle_t sc_dma_ioh;
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struct pciide_channel { /* per-channel data */
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/* internal bookkeeping */
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struct device *dev; /* 'wdc' dev attached */
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int compat; /* is it compat? */
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void *ih; /* compat or pci handle */
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/* used by wdc attachment (read-only after init) */
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int cmd_ioh_valid, ctl_ioh_valid;
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bus_space_tag_t cmd_iot, ctl_iot;
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bus_space_handle_t cmd_ioh, ctl_ioh;
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/* filled in by wdc attachment (written by wdc attach) */
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int (*ihand) __P((void *));
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void *ihandarg;
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} sc_channels[PCIIDE_NUM_CHANNELS];
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};
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#define PCIIDE_CHANNEL_NAME(chan) ((chan) == 0 ? "primary" : "secondary")
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#ifdef __BROKEN_INDIRECT_CONFIG
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int pciide_match __P((struct device *, void *, void *));
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#else
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int pciide_match __P((struct device *, struct cfdata *, void *));
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#endif
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void pciide_attach __P((struct device *, struct device *, void *));
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struct cfattach pciide_ca = {
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sizeof(struct pciide_softc), pciide_match, pciide_attach
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};
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int pciide_compat_intr __P((void *));
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int pciide_pci_intr __P((void *));
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int pciide_print __P((void *, const char *pnp));
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int
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pciide_match(parent, match, aux)
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struct device *parent;
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#ifdef __BROKEN_INDIRECT_CONFIG
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void *match;
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#else
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struct cfdata *match;
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#endif
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void *aux;
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{
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struct pci_attach_args *pa = aux;
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/*
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* Check the ID register to see that it's a PCI IDE controller.
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* If it is, we assume that we can deal with it; it _should_
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* work in a standardized way...
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*/
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if (PCI_CLASS(pa->pa_class) == PCI_CLASS_MASS_STORAGE &&
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PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_IDE) {
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return (1);
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}
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return (0);
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}
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void
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pciide_attach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct pci_attach_args *pa = aux;
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pci_chipset_tag_t pc = pa->pa_pc;
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struct pciide_softc *sc = (struct pciide_softc *)self;
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struct pciide_attach_args aa;
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struct pciide_channel *cp;
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pcireg_t class, interface, csr;
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pci_intr_handle_t intrhandle;
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const char *intrstr;
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char devinfo[256];
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int i;
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pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo);
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printf(": %s (rev. 0x%02x)\n", devinfo, PCI_REVISION(pa->pa_class));
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if ((pa->pa_flags & PCI_FLAGS_IO_ENABLED) == 0) {
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csr = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
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printf("%s: device disabled (at %s)\n", sc->sc_dev.dv_xname,
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(csr & PCI_COMMAND_IO_ENABLE) == 0 ? "device" : "bridge");
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return;
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}
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class = pci_conf_read(pc, pa->pa_tag, PCI_CLASS_REG);
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interface = PCI_INTERFACE(class);
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/*
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* Set up PCI interrupt.
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*
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* If mapping fails, that's (probably) because there's no pin
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* set to intr, which is (probably) because it's a compat-only
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* device (or hard-wired in compatibility-only mode). Native-PCI
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* channels will complain later if the interrupt was needed.
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*
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* If establishment fails, that's (probably) some other problem.
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*/
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if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin,
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pa->pa_intrline, &intrhandle) == 0) {
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intrstr = pci_intr_string(pa->pa_pc, intrhandle);
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sc->sc_pci_ih = pci_intr_establish(pa->pa_pc, intrhandle,
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IPL_BIO, pciide_pci_intr, sc);
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if (sc->sc_pci_ih != NULL) {
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printf("%s: using %s for native-PCI interrupt\n",
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sc->sc_dev.dv_xname,
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intrstr ? intrstr : "unknown interrupt");
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} else {
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printf("%s: couldn't establish native-PCI interrupt",
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sc->sc_dev.dv_xname);
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if (intrstr != NULL)
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printf(" at %s", intrstr);
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printf("\n");
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}
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}
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/*
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* Map DMA registers, if DMA is supported.
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*
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* Note that sc_dma_ioh_valid is a good test to see if DMA can
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* be done. If the interface doesn't support DMA, sc_dma_ioh_valid
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* will never be non-zero. If the DMA regs couldn't be mapped,
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* it'll be zero. I.e., sc_dma_ioh_valid will only be non-zero
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* if the interface supports DMA and the registers could be
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* mapped.
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*/
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if (interface & PCIIDE_INTERFACE_BUS_MASTER_DMA) {
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sc->sc_dma_ioh_valid = (pci_mapreg_map(pa,
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PCIIDE_REG_BUS_MASTER_DMA, PCI_MAPREG_TYPE_IO, 0,
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&sc->sc_dma_iot, &sc->sc_dma_ioh, NULL, NULL) == 0);
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printf("%s: bus-master DMA support present, but unused (%s)\n",
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sc->sc_dev.dv_xname,
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sc->sc_dma_ioh_valid ? "no driver support" :
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"couldn't map regs!");
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}
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for (i = 0; i < PCIIDE_NUM_CHANNELS; i++) {
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cp = &sc->sc_channels[i];
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if (interface & PCIIDE_INTERFACE_PCI(i)) {
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cp->compat = 0;
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cp->ih = sc->sc_pci_ih;
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cp->cmd_ioh_valid = (pci_mapreg_map(pa,
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PCIIDE_REG_CMD_BASE(i), PCI_MAPREG_TYPE_IO, 0,
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&cp->cmd_iot, &cp->cmd_ioh, NULL, NULL) == 0);
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cp->ctl_ioh_valid = (pci_mapreg_map(pa,
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PCIIDE_REG_CTL_BASE(i), PCI_MAPREG_TYPE_IO, 0,
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&cp->ctl_iot, &cp->ctl_ioh, NULL, NULL) == 0);
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} else {
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cp->compat = 1;
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cp->ih =
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pciide_machdep_compat_intr_establish(&sc->sc_dev,
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pa, i, pciide_compat_intr, cp);
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cp->cmd_iot = pa->pa_iot;
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cp->cmd_ioh_valid = (bus_space_map(cp->cmd_iot,
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PCIIDE_COMPAT_CMD_BASE(i), PCIIDE_COMPAT_CMD_SIZE,
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0, &cp->cmd_ioh) == 0);
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cp->ctl_iot = pa->pa_iot;
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cp->ctl_ioh_valid = (bus_space_map(cp->ctl_iot,
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PCIIDE_COMPAT_CTL_BASE(i), PCIIDE_COMPAT_CTL_SIZE,
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0, &cp->ctl_ioh) == 0);
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}
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}
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for (i = 0; i < PCIIDE_NUM_CHANNELS; i++) {
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cp = &sc->sc_channels[i];
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printf("%s: %s channel %s to %s mode\n",
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sc->sc_dev.dv_xname, PCIIDE_CHANNEL_NAME(i),
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(interface & PCIIDE_INTERFACE_SETTABLE(i)) ?
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"configured" : "wired",
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(interface & PCIIDE_INTERFACE_PCI(i)) ? "native-PCI" :
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"compatibility");
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if (cp->cmd_ioh_valid && cp->ctl_ioh_valid && cp->ih != NULL) {
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aa.channel = i;
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aa.cmd_iot = cp->cmd_iot;
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aa.cmd_ioh = cp->cmd_ioh;
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aa.ctl_iot = cp->ctl_iot;
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aa.ctl_ioh = cp->ctl_ioh;
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aa.ihandp = &cp->ihand;
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aa.ihandargp = &cp->ihandarg;
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cp->dev = config_found(self, &aa, pciide_print);
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/*
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* Note that if the 'wdc' device isn't configured,
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* the controller's resources are still marked as
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* being in use. This is a feature.
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*/
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} else {
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printf("%s: couldn't configure %s channel (cmd regs %s, ctl regs %s, (%s) intr %s)\n",
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sc->sc_dev.dv_xname, PCIIDE_CHANNEL_NAME(i),
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cp->cmd_ioh_valid ? "ok" : "unmapped",
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cp->ctl_ioh_valid ? "ok" : "unmapped",
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cp->compat ? "compat" : "native-PCI",
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cp->ih != NULL ? "ok" : "broken");
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}
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}
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}
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int
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pciide_print(aux, pnp)
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void *aux;
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const char *pnp;
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{
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struct pciide_attach_args *aa = aux;
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/* only 'wdc's can attach to 'pciide's; easy. */
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if (pnp)
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printf("wdc at %s", pnp);
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printf(" channel %d", aa->channel);
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return (UNCONF);
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}
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int
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pciide_compat_intr(arg)
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void *arg;
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{
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struct pciide_channel *cp = arg;
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#ifdef DIAGNOSTIC
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/* should only be called for a compat channel */
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if (cp->compat == 0)
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panic("pciide compat intr called for non-compat chan %p\n", cp);
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#endif
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/* if there's no handler, that probably means no dev attached */
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if (cp->ihand == NULL)
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return (0);
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return ((*cp->ihand)(cp->ihandarg));
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}
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int
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pciide_pci_intr(arg)
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void *arg;
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{
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struct pciide_softc *sc = arg;
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struct pciide_channel *cp;
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int i, rv, crv;
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rv = 0;
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for (i = 0; i < PCIIDE_NUM_CHANNELS; i++) {
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cp = &sc->sc_channels[i];
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/* If a compat channel or there's no handler, skip. */
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if (cp->compat || cp->ihand == NULL)
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continue;
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crv = ((*cp->ihand)(cp->ihandarg));
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if (crv == 0)
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; /* leave rv alone */
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else if (crv == 1)
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rv = 1; /* claim the intr */
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else if (rv == 0) /* crv should be -1 in this case */
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rv = crv; /* if we've done no better, take it */
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}
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return (rv);
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}
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