0ce3451d1f
Lots of the work was done by Adam Ciarcinsky. Currently, this only supports CyberPPC boards by Phase 5. Blizzard PPC expected later. The kernel is useless but for demonstrating that it starts... especially interupts, and most of MMU support, is not in yet. Builtin console works, however, and you can look at the kernel startup messages.
290 lines
7.9 KiB
C
290 lines
7.9 KiB
C
/* $NetBSD: bus.h,v 1.1 2000/05/25 22:11:59 is Exp $ */
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/*
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* Copyright (c) 1996 Leo Weppelman. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Leo Weppelman for the
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* NetBSD Project.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _AMIGA_BUS_H_
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#define _AMIGA_BUS_H_
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#include <sys/types.h>
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/*
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* Memory addresses (in bus space)
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*/
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typedef u_int32_t bus_addr_t;
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typedef u_int32_t bus_size_t;
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/*
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* Access methods for bus resources and address space.
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*/
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typedef struct bus_space_tag *bus_space_tag_t;
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typedef u_long bus_space_handle_t;
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/*
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* Lazyness macros for function declarations.
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*/
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#define bsr(what, typ) \
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typ (what)(bus_space_tag_t, bus_space_handle_t, bus_size_t)
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#define bsw(what, typ) \
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void (what)(bus_space_tag_t, bus_space_handle_t, bus_size_t, typ)
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#define bsrm(what, typ) \
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void (what)(bus_space_tag_t, bus_space_handle_t, bus_size_t, \
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typ *, bus_size_t)
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#define bswm(what, typ) \
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void (what)(bus_space_tag_t, bus_space_handle_t, bus_size_t, \
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const typ *, bus_size_t)
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#define bssr(what, typ) \
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void (what)(bus_space_tag_t, bus_space_handle_t, bus_size_t, \
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typ, bus_size_t)
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#define bscr(what, typ) \
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void (what)(bus_space_tag_t, \
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bus_space_handle_t, bus_size_t, \
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bus_space_handle_t, bus_size_t, \
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bus_size_t)
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/* declarations for _1 functions */
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bsrm(bus_space_read_multi_1, u_int8_t);
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bswm(bus_space_write_multi_1, u_int8_t);
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bsrm(bus_space_read_region_1, u_int8_t);
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bswm(bus_space_write_region_1, u_int8_t);
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bsrm(bus_space_read_region_stream_1, u_int8_t);
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bswm(bus_space_write_region_stream_1, u_int8_t);
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bssr(bus_space_set_region_1, u_int8_t);
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bscr(bus_space_copy_region_1, u_int8_t);
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/*
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* Implementation specific structures.
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* XXX Don't use outside of bus_space definitions!
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* XXX maybe this should be encapsuled in a non-global .h file?
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*/
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struct bus_space_tag {
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bus_addr_t base;
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u_int8_t stride;
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u_int8_t dum[3];
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const struct amiga_bus_space_methods *absm;
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};
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struct amiga_bus_space_methods {
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/* 16bit methods */
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bsr(*bsr2, u_int16_t);
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bsw(*bsw2, u_int16_t);
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bsrm(*bsrm2, u_int16_t);
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bswm(*bswm2, u_int16_t);
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bsrm(*bsrr2, u_int16_t);
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bswm(*bswr2, u_int16_t);
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bsrm(*bsrrs2, u_int16_t);
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bswm(*bswrs2, u_int16_t);
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bssr(*bssr2, u_int16_t);
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bscr(*bscr2, u_int16_t);
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/* add 32bit methods here */
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};
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const struct amiga_bus_space_methods amiga_contiguous_methods;
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const struct amiga_bus_space_methods amiga_interleaved_methods;
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const struct amiga_bus_space_methods amiga_interleaved_wordaccess_methods;
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/*
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* Macro definition of map, unmap, etc.
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*/
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#define bus_space_map(tag,off,size,cache,handle) \
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(*(handle) = (tag)->base + ((off)<<(tag)->stride), 0)
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#define bus_space_subregion(tag, handle, offset, size, nhandlep) \
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(*(nhandlep) = (handle) + ((offset)<<(tag)->stride), 0)
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#define bus_space_unmap(tag,handle,size) (void)0
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/*
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* Macro definition of some _1 functions:
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*/
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#define bus_space_read_1(t, h, o) \
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((void) t, (*(volatile u_int8_t *)((h) + ((o)<<(t)->stride))))
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#define bus_space_write_1(t, h, o, v) \
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((void) t, ((void)(*(volatile u_int8_t *)((h) + ((o)<<(t)->stride)) = (v))))
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/*
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* Inline definition of other _1 functions:
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*/
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extern __inline__ void
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bus_space_read_multi_1(t, h, o, a, c)
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bus_space_tag_t t;
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bus_space_handle_t h;
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bus_size_t o, c;
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u_int8_t *a;
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{
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for (; c; a++, c--)
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*a = bus_space_read_1(t, h, o);
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}
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extern __inline__ void
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bus_space_write_multi_1(t, h, o, a, c)
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bus_space_tag_t t;
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bus_space_handle_t h;
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bus_size_t o, c;
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const u_int8_t *a;
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{
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for (; c; a++, c--)
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bus_space_write_1(t, h, o, *a);
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}
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extern __inline__ void
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bus_space_read_region_1(t, h, o, a, c)
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bus_space_tag_t t;
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bus_space_handle_t h;
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bus_size_t o, c;
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u_int8_t *a;
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{
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for (; c; a++, c--)
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*a = bus_space_read_1(t, h, o++);
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}
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extern __inline__ void
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bus_space_write_region_1(t, h, o, a, c)
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bus_space_tag_t t;
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bus_space_handle_t h;
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bus_size_t o, c;
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const u_int8_t *a;
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{
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for (; c; a++, c--)
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bus_space_write_1(t, h, o++, *a);
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}
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extern __inline__ void
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bus_space_set_region_1(t, h, o, v, c)
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bus_space_tag_t t;
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bus_space_handle_t h;
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bus_size_t o, c;
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u_int8_t v;
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{
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while (c--)
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bus_space_write_1(t, h, o++, v);
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}
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extern __inline__ void
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bus_space_copy_region_1(t, srch, srco, dsth, dsto, c)
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bus_space_tag_t t;
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bus_space_handle_t srch, dsth;
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bus_size_t srco, dsto, c;
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{
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u_int8_t v;
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while (c--) {
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v = bus_space_read_1(t, srch, srco++);
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bus_space_write_1(t, dsth, dsto++, v);
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}
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}
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extern __inline__ void
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bus_space_read_region_stream_1(t, h, o, a, c)
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bus_space_tag_t t;
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bus_space_handle_t h;
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bus_size_t o, c;
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u_int8_t *a;
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{
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for (; c; a++, c--)
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*a = bus_space_read_1(t, h, o++);
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}
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extern __inline__ void
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bus_space_write_region_stream_1(t, h, o, a, c)
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bus_space_tag_t t;
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bus_space_handle_t h;
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bus_size_t o, c;
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const u_int8_t *a;
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{
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for (; c; a++, c--)
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bus_space_write_1(t, h, o++, *a);
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}
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/*
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* Macro definition of _2 functions as indirect method array calls
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*/
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#define bus_space_read_2(t, h, o) ((t)->absm->bsr2)((t), (h), (o))
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#define bus_space_write_2(t, h, o, v) ((t)->absm->bsw2)((t), (h), (o), (v))
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#define bus_space_read_multi_2(t, h, o, p, c) \
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((t)->absm->bsrm2)((t), (h), (o), (p), (c))
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#define bus_space_write_multi_2(t, h, o, p, c) \
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((t)->absm->bswm2)((t), (h), (o), (p), (c))
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#define bus_space_read_region_2(t, h, o, p, c) \
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((t)->absm->bsrr2)((t), (h), (o), (p), (c))
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#define bus_space_write_region_2(t, h, o, p, c) \
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((t)->absm->bswr2)((t), (h), (o), (p), (c))
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#define bus_space_read_region_stream_2(t, h, o, p, c) \
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((t)->absm->bsrrs2)((t), (h), (o), (p), (c))
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#define bus_space_write_region_stream_2(t, h, o, p, c) \
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((t)->absm->bswrs2)((t), (h), (o), (p), (c))
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#define bus_space_set_region_2(t, h, o, v, c) \
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((t)->absm->bssr2)((t), (h), (o), (v), (c))
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#define bus_space_copy_region_2(t, srch, srco, dsth, dsto, c) \
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((t)->absm->bscr2)((t), (srch), (srco), (dsth), (dsto), (c))
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/*
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* Bus read/write barrier methods.
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*
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* void bus_space_barrier __P((bus_space_tag_t tag,
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* bus_space_handle_t bsh, bus_size_t offset,
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* bus_size_t len, int flags));
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*
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* Note: the 680x0 does not currently require barriers, but we must
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* provide the flags to MI code.
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*/
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#define bus_space_barrier(t, h, o, l, f) \
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((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)))
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#define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
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#define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
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#define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
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#endif /* _AMIGA_BUS_H_ */
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