b40a3c98f5
mips-based Sony news wire the FPU to hard-interrupt 3, rather than 5 as recommended in Kane.
14 lines
306 B
C
14 lines
306 B
C
/* $NetBSD: cpu.h,v 1.18 1998/03/25 08:35:39 jonathan Exp $ */
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#ifndef __PMAX_CPU_H
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#define __PMAX_CPU_H
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/*
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* pmax uses standard mips1 convention, wiring FPU to hard interupt 5.
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*/
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#include <mips/cpu.h>
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#include <mips/cpuregs.h> /* XXX */
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#define MIPS_INT_MASK_FPU MIPS_INT_MASK_5
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#endif __PMAX_CPU_H
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