141 lines
4.4 KiB
C
141 lines
4.4 KiB
C
/* $NetBSD: intr.h,v 1.17 2004/07/07 00:08:43 sekiya Exp $ */
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/*
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* Copyright (c) 2000 Soren S. Jorvang
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the
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* NetBSD Project. See http://www.NetBSD.org/ for
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* information about NetBSD.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _SGIMIPS_INTR_H_
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#define _SGIMIPS_INTR_H_
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#define IPL_NONE 0 /* Disable only this interrupt. */
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#define IPL_BIO 1 /* Disable block I/O interrupts. */
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#define IPL_NET 2 /* Disable network interrupts. */
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#define IPL_TTY 3 /* Disable terminal interrupts. */
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#define IPL_CLOCK 4 /* Disable clock interrupts. */
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#define IPL_STATCLOCK 5 /* Disable profiling interrupts. */
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#ifndef __NO_SOFT_SERIAL_INTERRUPT
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#define IPL_SERIAL 6 /* Disable serial hardware interrupts. */
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#endif
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#define IPL_HIGH 7 /* Disable all interrupts. */
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#define NIPL 8
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/* Interrupt sharing types. */
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#define IST_NONE 0 /* none */
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#define IST_PULSE 1 /* pulsed */
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#define IST_EDGE 2 /* edge-triggered */
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#define IST_LEVEL 3 /* level-triggered */
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/* Soft interrupt numbers */
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#define IPL_SOFT 0 /* generic software interrupts */
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#define IPL_SOFTSERIAL 1 /* serial software interrupts */
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#define IPL_SOFTNET 2 /* network software interrupts */
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#define IPL_SOFTCLOCK 3 /* clock software interrupts */
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#define _IPL_NSOFT 4
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#define IPL_SOFTNAMES { \
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"misc", \
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"serial", \
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"net", \
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"clock", \
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}
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#ifdef _KERNEL
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#ifndef _LOCORE
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#include <sys/queue.h>
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#include <sys/types.h>
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#include <sys/device.h>
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#include <mips/cpuregs.h>
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#define NINTR 32
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struct sgimips_intrhand {
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LIST_ENTRY(sgimips_intrhand)
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ih_q;
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int (*ih_fun) (void *);
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void *ih_arg;
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struct sgimips_intr *ih_intrhead;
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struct sgimips_intrhand *ih_next;
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int ih_pending;
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};
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struct sgimips_intr {
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LIST_HEAD(,sgimips_intrhand)
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intr_q;
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struct evcnt ih_evcnt;
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unsigned long intr_ipl;
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};
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extern struct sgimips_intrhand intrtab[];
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extern int _splraise(int);
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extern int _spllower(int);
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extern int _splset(int);
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extern int _splget(void);
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extern void _splnone(void);
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extern void _setsoftintr(int);
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extern void _clrsoftintr(int);
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extern u_int32_t biomask;
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extern u_int32_t netmask;
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extern u_int32_t ttymask;
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extern u_int32_t clockmask;
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#define splhigh() _splraise(MIPS_INT_MASK)
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#define spl0() (void)_spllower(0)
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#define splx(s) (void)_splset(s)
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#define splbio() _splraise(biomask)
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#define splnet() _splraise(netmask)
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#define spltty() _splraise(ttymask)
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#define splvm() spltty()
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#define splclock() _splraise(clockmask)
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#define splstatclock() splclock()
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#define splsched() splhigh()
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#define spllock() splhigh()
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#define splserial() spltty()
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#define spllpt() spltty()
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#define splsoft() _splraise(MIPS_SOFT_INT_MASK_1)
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#define splsoftclock() splsoft()
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#define splsoftnet() splsoft()
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#define spllowersoftclock() _spllower(MIPS_SOFT_INT_MASK_1)
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extern void * cpu_intr_establish(int, int, int (*)(void *), void *);
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#include <mips/softintr.h>
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#endif /* _LOCORE */
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#endif /* !_KERNEL */
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#endif /* !_SGIMIPS_INTR_H_ */
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