720 lines
18 KiB
C
720 lines
18 KiB
C
/* $OpenBSD: fins.c,v 1.1 2008/03/19 19:33:09 deraadt Exp $ */
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/* $NetBSD: finsio_isa.c,v 1.7 2011/07/31 18:23:46 jakllsch Exp $ */
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/*
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* Copyright (c) 2008 Juan Romero Pardines
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* Copyright (c) 2007, 2008 Geoff Steckel
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* Copyright (c) 2005, 2006 Mark Kettenis
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: finsio_isa.c,v 1.7 2011/07/31 18:23:46 jakllsch Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <dev/isa/isareg.h>
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#include <dev/isa/isavar.h>
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#include <dev/sysmon/sysmonvar.h>
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/* Derived from LM78 code. Only handles chips attached to ISA bus */
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/*
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* Fintek F71805/F71883 Super I/O datasheets:
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* http://www.fintek.com.tw/files/productfiles/F71805F_V025.pdf
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* http://www.fintek.com.tw/files/productfiles/F71883_V026P.pdf
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*
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* This chip is a multi-io chip with many functions.
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* Each function may be relocated in I/O space by the BIOS.
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* The base address (2E or 4E) accesses a configuration space which
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* has pointers to the individual functions. The config space must be
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* unlocked with a cookie and relocked afterwards. The chip ID is stored
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* in config space so it is not normally visible.
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*
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* The voltage dividers specified are from reading the chips on one board.
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* There is no way to determine what they are in the general case.
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*/
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#define FINSIO_UNLOCK 0x87 /* magic constant - write 2x to select chip */
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#define FINSIO_LOCK 0xaa /* magic constant - write 1x to deselect reg */
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#define FINSIO_FUNC_SEL 0x07 /* select which subchip to access */
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# define FINSIO_FUNC_HWMON 0x4
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/* ISA registers index to an internal register space on chip */
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#define FINSIO_DECODE_SIZE (8)
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#define FINSIO_DECODE_MASK (FINSIO_DECODE_SIZE - 1)
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#define FINSIO_ADDR 5 /* global configuration index */
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#define FINSIO_DATA 6 /* and data registers */
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/* Global configuration registers */
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#define FINSIO_MANUF 0x23 /* manufacturer ID */
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# define FINTEK_ID 0x1934
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#define FINSIO_CHIP 0x20 /* chip ID */
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# define FINSIO_IDF71805 0x0406
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# define FINSIO_IDF71806 0x0341 /* F71872 and F1806 F/FG */
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# define FINSIO_IDF71883 0x0541 /* F71882 and F1883 */
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# define FINSIO_IDF71862 0x0601 /* F71862FG */
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# define FINSIO_IDF8000 0x0581 /* F8000 */
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/* in bank sensors of config space */
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#define FINSIO_SENSADDR 0x60 /* sensors assigned I/O address (2 bytes) */
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#define FINSIO_HWMON_CONF 0x01 /* Hardware Monitor Config. Register */
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/* in sensors space */
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#define FINSIO_TMODE 0x01 /* temperature mode reg */
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#define FINSIO_MAX_SENSORS 20
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/*
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* Fintek chips typically measure voltages using 8mv steps.
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* To measure higher voltages the input is attenuated with (external)
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* resistors. Negative voltages are measured using inverting op amps
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* and resistors. So we have to convert the sensor values back to
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* real voltages by applying the appropriate resistor factor.
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*/
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#define FRFACT_NONE 8000
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#define FRFACT(x, y) (FRFACT_NONE * ((x) + (y)) / (y))
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#define FNRFACT(x, y) (-FRFACT_NONE * (x) / (y))
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#if defined(FINSIODEBUG)
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#define DPRINTF(x) do { printf x; } while (0)
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#else
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#define DPRINTF(x)
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#endif
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struct finsio_softc {
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_ioh;
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struct sysmon_envsys *sc_sme;
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envsys_data_t sc_sensor[FINSIO_MAX_SENSORS];
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struct finsio_sensor *sc_finsio_sensors;
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u_int sc_tempsel;
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};
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struct finsio_sensor {
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const char *fs_desc;
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u_int fs_type;
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uint8_t fs_aux;
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uint8_t fs_reg;
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void (*fs_refresh)(struct finsio_softc *, envsys_data_t *);
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int fs_rfact;
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};
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static int finsio_isa_match(device_t, cfdata_t, void *);
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static void finsio_isa_attach(device_t, device_t, void *);
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static int finsio_isa_detach(device_t, int);
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static void finsio_enter(bus_space_tag_t, bus_space_handle_t);
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static void finsio_exit(bus_space_tag_t, bus_space_handle_t);
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static uint8_t finsio_readreg(bus_space_tag_t, bus_space_handle_t, int);
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static void finsio_writereg(bus_space_tag_t, bus_space_handle_t, int, int);
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static void finsio_refresh(struct sysmon_envsys *, envsys_data_t *);
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static void finsio_refresh_volt(struct finsio_softc *, envsys_data_t *);
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static void finsio_refresh_temp(struct finsio_softc *, envsys_data_t *);
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static void finsio_refresh_fanrpm(struct finsio_softc *, envsys_data_t *);
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CFATTACH_DECL_NEW(finsio, sizeof(struct finsio_softc),
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finsio_isa_match, finsio_isa_attach, finsio_isa_detach, NULL);
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/* Sensors available in F71805/F71806 */
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static struct finsio_sensor f71805_sensors[] = {
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/* Voltage */
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{
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.fs_desc = "+3.3V",
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.fs_type = ENVSYS_SVOLTS_DC,
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.fs_aux = 0,
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.fs_reg = 0x10,
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.fs_refresh = finsio_refresh_volt,
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.fs_rfact = FRFACT(100, 100)
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},
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{
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.fs_desc = "Vtt",
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.fs_type = ENVSYS_SVOLTS_DC,
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.fs_aux = 0,
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.fs_reg = 0x11,
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.fs_refresh = finsio_refresh_volt,
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.fs_rfact = FRFACT_NONE
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},
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{
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.fs_desc = "Vram",
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.fs_type = ENVSYS_SVOLTS_DC,
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.fs_aux = 0,
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.fs_reg = 0x12,
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.fs_refresh = finsio_refresh_volt,
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.fs_rfact = FRFACT(100, 100)
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},
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{
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.fs_desc = "Vchips",
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.fs_type = ENVSYS_SVOLTS_DC,
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.fs_aux = 0,
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.fs_reg = 0x13,
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.fs_refresh = finsio_refresh_volt,
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.fs_rfact = FRFACT(47, 100)
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},
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{
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.fs_desc = "+5V",
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.fs_type = ENVSYS_SVOLTS_DC,
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.fs_aux = 0,
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.fs_reg = 0x14,
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.fs_refresh = finsio_refresh_volt,
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.fs_rfact = FRFACT(200, 47)
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},
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{
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.fs_desc = "+12V",
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.fs_type = ENVSYS_SVOLTS_DC,
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.fs_aux = 0,
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.fs_reg = 0x15,
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.fs_refresh = finsio_refresh_volt,
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.fs_rfact = FRFACT(200, 20)
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},
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{
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.fs_desc = "Vcc 1.5V",
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.fs_type = ENVSYS_SVOLTS_DC,
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.fs_aux = 0,
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.fs_reg = 0x16,
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.fs_refresh = finsio_refresh_volt,
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.fs_rfact = FRFACT_NONE
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},
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{
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.fs_desc = "VCore",
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.fs_type = ENVSYS_SVOLTS_DC,
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.fs_aux = 0,
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.fs_reg = 0x17,
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.fs_refresh = finsio_refresh_volt,
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.fs_rfact = FRFACT_NONE
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},
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{
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.fs_desc = "Vsb",
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.fs_type = ENVSYS_SVOLTS_DC,
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.fs_aux = 0,
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.fs_reg = 0x18,
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.fs_refresh = finsio_refresh_volt,
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.fs_rfact = FRFACT(200, 47)
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},
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{
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.fs_desc = "Vsbint",
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.fs_type = ENVSYS_SVOLTS_DC,
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.fs_aux = 0,
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.fs_reg = 0x19,
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.fs_refresh = finsio_refresh_volt,
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.fs_rfact = FRFACT(200, 47)
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},
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{
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.fs_desc = "Vbat",
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.fs_type = ENVSYS_SVOLTS_DC,
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.fs_aux = 0,
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.fs_reg = 0x1a,
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.fs_refresh = finsio_refresh_volt,
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.fs_rfact = FRFACT(200, 47)
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},
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/* Temperature */
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{
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.fs_desc = "Temp1",
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.fs_type = ENVSYS_STEMP,
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.fs_aux = 0x01,
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.fs_reg = 0x1b,
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.fs_refresh = finsio_refresh_temp,
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.fs_rfact = 0
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},
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{
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.fs_desc = "Temp2",
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.fs_type = ENVSYS_STEMP,
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.fs_aux = 0x02,
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.fs_reg = 0x1c,
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.fs_refresh = finsio_refresh_temp,
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.fs_rfact = 0
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},
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{
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.fs_desc = "Temp3",
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.fs_type = ENVSYS_STEMP,
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.fs_aux = 0x04,
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.fs_reg = 0x1d,
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.fs_refresh = finsio_refresh_temp,
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.fs_rfact = 0
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},
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/* Fans */
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{
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.fs_desc = "Fan1",
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.fs_type = ENVSYS_SFANRPM,
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.fs_aux = 0,
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.fs_reg = 0x20,
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.fs_refresh = finsio_refresh_fanrpm,
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.fs_rfact = 0
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},
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{
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.fs_desc = "Fan2",
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.fs_type = ENVSYS_SFANRPM,
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.fs_aux = 0,
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.fs_reg = 0x22,
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.fs_refresh = finsio_refresh_fanrpm,
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.fs_rfact = 0
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},
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{
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.fs_desc = "Fan3",
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.fs_type = ENVSYS_SFANRPM,
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.fs_aux = 0,
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.fs_reg = 0x24,
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.fs_refresh = finsio_refresh_fanrpm,
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.fs_rfact = 0
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},
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{ .fs_desc = NULL }
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};
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/* Sensors available in F71862/F71882/F71883 */
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static struct finsio_sensor f71883_sensors[] = {
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/* Voltage */
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{
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.fs_desc = "+3.3V",
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.fs_type = ENVSYS_SVOLTS_DC,
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.fs_aux = 0,
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.fs_reg = 0x20,
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.fs_refresh = finsio_refresh_volt,
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.fs_rfact = FRFACT(100, 100)
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},
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{
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.fs_desc = "Vcore",
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.fs_type = ENVSYS_SVOLTS_DC,
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.fs_aux = 0,
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.fs_reg = 0x21,
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.fs_refresh = finsio_refresh_volt,
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.fs_rfact = FRFACT_NONE
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},
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{
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.fs_desc = "VIN2",
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.fs_type = ENVSYS_SVOLTS_DC,
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.fs_aux = 0,
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.fs_reg = 0x22,
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.fs_refresh = finsio_refresh_volt,
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.fs_rfact = FRFACT(100, 100)
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},
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{
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.fs_desc = "VIN3",
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.fs_type = ENVSYS_SVOLTS_DC,
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.fs_aux = 0,
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.fs_reg = 0x23,
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.fs_refresh = finsio_refresh_volt,
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.fs_rfact = FRFACT(47, 100)
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},
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{
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.fs_desc = "VIN4",
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.fs_type = ENVSYS_SVOLTS_DC,
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.fs_aux = 0,
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.fs_reg = 0x24,
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.fs_refresh = finsio_refresh_volt,
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.fs_rfact = FRFACT(200, 47)
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},
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{
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.fs_desc = "VIN5",
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.fs_type = ENVSYS_SVOLTS_DC,
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.fs_aux = 0,
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.fs_reg = 0x25,
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.fs_refresh = finsio_refresh_volt,
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.fs_rfact = FRFACT(200, 20)
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},
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{
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.fs_desc = "VIN6",
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.fs_type = ENVSYS_SVOLTS_DC,
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.fs_aux = 0,
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.fs_reg = 0x26,
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.fs_refresh = finsio_refresh_volt,
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.fs_rfact = FRFACT(100, 100)
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},
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{
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.fs_desc = "VSB +3.3V",
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.fs_type = ENVSYS_SVOLTS_DC,
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.fs_aux = 0,
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.fs_reg = 0x27,
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.fs_refresh = finsio_refresh_volt,
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.fs_rfact = FRFACT(200, 47)
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},
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{
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.fs_desc = "VBAT",
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.fs_type = ENVSYS_SVOLTS_DC,
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.fs_aux = 0,
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.fs_reg = 0x28,
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.fs_refresh = finsio_refresh_volt,
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.fs_rfact = FRFACT(200, 47)
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},
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/* Temperature */
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{
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.fs_desc = "Temp1",
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.fs_type = ENVSYS_STEMP,
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.fs_aux = 0x1,
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.fs_reg = 0x72,
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.fs_refresh = finsio_refresh_temp,
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.fs_rfact = 0
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},
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{
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.fs_desc = "Temp2",
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.fs_type = ENVSYS_STEMP,
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.fs_aux = 0x2,
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.fs_reg = 0x74,
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.fs_refresh = finsio_refresh_temp,
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.fs_rfact = 0
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},
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{
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.fs_desc = "Temp3",
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.fs_type = ENVSYS_STEMP,
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.fs_aux = 0x4,
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.fs_reg = 0x76,
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.fs_refresh = finsio_refresh_temp,
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.fs_rfact = 0
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},
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/* Fan */
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{
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.fs_desc = "Fan1",
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.fs_type = ENVSYS_SFANRPM,
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.fs_aux = 0,
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.fs_reg = 0xa0,
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.fs_refresh = finsio_refresh_fanrpm,
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.fs_rfact = 0
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},
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{
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.fs_desc = "Fan2",
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.fs_type = ENVSYS_SFANRPM,
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.fs_aux = 0,
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.fs_reg = 0xb0,
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.fs_refresh = finsio_refresh_fanrpm,
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.fs_rfact = 0
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},
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{
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.fs_desc = "Fan3",
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.fs_type = ENVSYS_SFANRPM,
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.fs_aux = 0,
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.fs_reg = 0xc0,
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.fs_refresh = finsio_refresh_fanrpm,
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.fs_rfact = 0
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},
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{
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.fs_desc = "Fan4",
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.fs_type = ENVSYS_SFANRPM,
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.fs_aux = 0,
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.fs_reg = 0xd0,
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.fs_refresh = finsio_refresh_fanrpm,
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.fs_rfact = 0
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},
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{ .fs_desc = NULL }
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};
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static int
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finsio_isa_match(device_t parent, cfdata_t match, void *aux)
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{
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struct isa_attach_args *ia = aux;
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bus_space_handle_t ioh;
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uint16_t val;
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/* Must supply an address */
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if (ia->ia_nio < 1)
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return 0;
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if (ISA_DIRECT_CONFIG(ia))
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return 0;
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if (ia->ia_io[0].ir_addr == ISA_UNKNOWN_PORT)
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return 0;
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if (bus_space_map(ia->ia_iot, ia->ia_io[0].ir_addr, 2, 0, &ioh))
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return 0;
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finsio_enter(ia->ia_iot, ioh);
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/* Find out Manufacturer ID */
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val = finsio_readreg(ia->ia_iot, ioh, FINSIO_MANUF) << 8;
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val |= finsio_readreg(ia->ia_iot, ioh, FINSIO_MANUF + 1);
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finsio_exit(ia->ia_iot, ioh);
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bus_space_unmap(ia->ia_iot, ioh, 2);
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if (val != FINTEK_ID)
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return 0;
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ia->ia_nio = 1;
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ia->ia_io[0].ir_size = 2;
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ia->ia_niomem = 0;
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ia->ia_nirq = 0;
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ia->ia_ndrq = 0;
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return 1;
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}
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static void
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finsio_isa_attach(device_t parent, device_t self, void *aux)
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{
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struct finsio_softc *sc = device_private(self);
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struct isa_attach_args *ia = aux;
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bus_space_handle_t ioh;
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uint16_t hwmon_baddr, chipid, cr;
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int i, rv = 0;
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aprint_naive("\n");
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sc->sc_iot = ia->ia_iot;
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/* Map Super I/O configuration space */
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if (bus_space_map(sc->sc_iot, ia->ia_io[0].ir_addr, 2, 0, &ioh)) {
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aprint_error(": can't map configuration I/O space\n");
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return;
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}
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finsio_enter(sc->sc_iot, ioh);
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/* Get the Chip ID */
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chipid = finsio_readreg(sc->sc_iot, ioh, FINSIO_CHIP) << 8;
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chipid |= finsio_readreg(sc->sc_iot, ioh, FINSIO_CHIP + 1);
|
|
/*
|
|
* Select the Hardware Monitor LDN to find out the I/O
|
|
* address space.
|
|
*/
|
|
finsio_writereg(sc->sc_iot, ioh, FINSIO_FUNC_SEL, FINSIO_FUNC_HWMON);
|
|
hwmon_baddr = finsio_readreg(sc->sc_iot, ioh, FINSIO_SENSADDR) << 8;
|
|
hwmon_baddr |= finsio_readreg(sc->sc_iot, ioh, FINSIO_SENSADDR + 1);
|
|
finsio_exit(sc->sc_iot, ioh);
|
|
bus_space_unmap(sc->sc_iot, ioh, 2);
|
|
|
|
/*
|
|
* The address decoder ignores the bottom 3 bits, so do we.
|
|
*/
|
|
hwmon_baddr &= ~FINSIO_DECODE_MASK;
|
|
|
|
switch (chipid) {
|
|
case FINSIO_IDF71805:
|
|
sc->sc_finsio_sensors = f71805_sensors;
|
|
aprint_normal(": Fintek F71805 Super I/O\n");
|
|
break;
|
|
case FINSIO_IDF71806:
|
|
sc->sc_finsio_sensors = f71805_sensors;
|
|
aprint_normal(": Fintek F71806/F71872 Super I/O\n");
|
|
break;
|
|
case FINSIO_IDF71862:
|
|
sc->sc_finsio_sensors = f71883_sensors;
|
|
aprint_normal(": Fintek F71862 Super I/O\n");
|
|
break;
|
|
case FINSIO_IDF71883:
|
|
sc->sc_finsio_sensors = f71883_sensors;
|
|
aprint_normal(": Fintek F71882/F71883 Super I/O\n");
|
|
break;
|
|
case FINSIO_IDF8000:
|
|
sc->sc_finsio_sensors = f71883_sensors;
|
|
aprint_normal(": ASUS F8000 Super I/O\n");
|
|
break;
|
|
default:
|
|
/*
|
|
* Unknown Chip ID, assume the same register layout
|
|
* than F71805 for now.
|
|
*/
|
|
sc->sc_finsio_sensors = f71805_sensors;
|
|
aprint_normal(": Fintek Super I/O (unknown chip ID %x)\n",
|
|
chipid);
|
|
break;
|
|
}
|
|
|
|
/* Map Hardware Monitor I/O space */
|
|
if (bus_space_map(sc->sc_iot, hwmon_baddr, FINSIO_DECODE_SIZE,
|
|
0, &sc->sc_ioh)) {
|
|
aprint_error(": can't map hwmon I/O space\n");
|
|
return;
|
|
}
|
|
|
|
/*
|
|
* Enable Hardware monitoring for fan/temperature and
|
|
* voltage sensors.
|
|
*/
|
|
cr = finsio_readreg(sc->sc_iot, sc->sc_ioh, FINSIO_HWMON_CONF);
|
|
finsio_writereg(sc->sc_iot, sc->sc_ioh, FINSIO_HWMON_CONF, cr | 0x3);
|
|
|
|
/* Find out the temperature mode */
|
|
sc->sc_tempsel = finsio_readreg(sc->sc_iot, sc->sc_ioh, FINSIO_TMODE);
|
|
|
|
/*
|
|
* Initialize and attach sensors with sysmon_envsys(9).
|
|
*/
|
|
sc->sc_sme = sysmon_envsys_create();
|
|
for (i = 0; sc->sc_finsio_sensors[i].fs_desc; i++) {
|
|
sc->sc_sensor[i].state = ENVSYS_SINVALID;
|
|
sc->sc_sensor[i].units = sc->sc_finsio_sensors[i].fs_type;
|
|
if (sc->sc_sensor[i].units == ENVSYS_SVOLTS_DC)
|
|
sc->sc_sensor[i].flags = ENVSYS_FCHANGERFACT;
|
|
strlcpy(sc->sc_sensor[i].desc, sc->sc_finsio_sensors[i].fs_desc,
|
|
sizeof(sc->sc_sensor[i].desc));
|
|
if (sysmon_envsys_sensor_attach(sc->sc_sme,
|
|
&sc->sc_sensor[i]))
|
|
goto fail;
|
|
}
|
|
|
|
sc->sc_sme->sme_name = device_xname(self);
|
|
sc->sc_sme->sme_cookie = sc;
|
|
sc->sc_sme->sme_refresh = finsio_refresh;
|
|
if ((rv = sysmon_envsys_register(sc->sc_sme))) {
|
|
aprint_error(": unable to register with sysmon (%d)\n", rv);
|
|
goto fail;
|
|
}
|
|
|
|
aprint_normal_dev(self,
|
|
"Hardware Monitor registers at 0x%x\n", hwmon_baddr);
|
|
return;
|
|
|
|
fail:
|
|
sysmon_envsys_destroy(sc->sc_sme);
|
|
bus_space_unmap(sc->sc_iot, sc->sc_ioh, FINSIO_DECODE_SIZE);
|
|
}
|
|
|
|
static int
|
|
finsio_isa_detach(device_t self, int flags)
|
|
{
|
|
struct finsio_softc *sc = device_private(self);
|
|
|
|
sysmon_envsys_unregister(sc->sc_sme);
|
|
bus_space_unmap(sc->sc_iot, sc->sc_ioh, FINSIO_DECODE_SIZE);
|
|
return 0;
|
|
}
|
|
|
|
/* Enter Super I/O configuration mode */
|
|
static void
|
|
finsio_enter(bus_space_tag_t iot, bus_space_handle_t ioh)
|
|
{
|
|
bus_space_write_1(iot, ioh, FINSIO_ADDR, FINSIO_UNLOCK);
|
|
bus_space_write_1(iot, ioh, FINSIO_ADDR, FINSIO_UNLOCK);
|
|
}
|
|
|
|
/* Exit Super I/O configuration mode */
|
|
static void
|
|
finsio_exit(bus_space_tag_t iot, bus_space_handle_t ioh)
|
|
{
|
|
bus_space_write_1(iot, ioh, FINSIO_ADDR, FINSIO_LOCK);
|
|
}
|
|
|
|
static uint8_t
|
|
finsio_readreg(bus_space_tag_t iot, bus_space_handle_t ioh, int reg)
|
|
{
|
|
bus_space_write_1(iot, ioh, FINSIO_ADDR, reg);
|
|
return bus_space_read_1(iot, ioh, FINSIO_DATA);
|
|
}
|
|
|
|
static void
|
|
finsio_writereg(bus_space_tag_t iot, bus_space_handle_t ioh, int reg, int val)
|
|
{
|
|
bus_space_write_1(iot, ioh, FINSIO_ADDR, reg);
|
|
bus_space_write_1(iot, ioh, FINSIO_DATA, val);
|
|
}
|
|
|
|
static void
|
|
finsio_refresh(struct sysmon_envsys *sme, envsys_data_t *edata)
|
|
{
|
|
struct finsio_softc *sc = sme->sme_cookie;
|
|
int i = edata->sensor;
|
|
|
|
sc->sc_finsio_sensors[i].fs_refresh(sc, edata);
|
|
}
|
|
|
|
static void
|
|
finsio_refresh_volt(struct finsio_softc *sc, envsys_data_t *edata)
|
|
{
|
|
struct finsio_sensor *fs = &sc->sc_finsio_sensors[edata->sensor];
|
|
int data;
|
|
|
|
data = finsio_readreg(sc->sc_iot, sc->sc_ioh, fs->fs_reg);
|
|
DPRINTF(("%s: data 0x%x\n", __func__, data));
|
|
|
|
if (data == 0xff || data == 0)
|
|
edata->state = ENVSYS_SINVALID;
|
|
else {
|
|
edata->state = ENVSYS_SVALID;
|
|
if (edata->rfact)
|
|
edata->value_cur = data * edata->rfact;
|
|
else
|
|
edata->value_cur = data * fs->fs_rfact;
|
|
}
|
|
}
|
|
|
|
/* The BIOS seems to add a fudge factor to the CPU temp of +5C */
|
|
static void
|
|
finsio_refresh_temp(struct finsio_softc *sc, envsys_data_t *edata)
|
|
{
|
|
struct finsio_sensor *fs = &sc->sc_finsio_sensors[edata->sensor];
|
|
u_int data;
|
|
u_int llmax;
|
|
|
|
/*
|
|
* The data sheet says that the range of the temperature
|
|
* sensor is between 0 and 127 or 140 degrees C depending on
|
|
* what kind of sensor is used.
|
|
* A disconnected sensor seems to read over 110 or so.
|
|
*/
|
|
data = finsio_readreg(sc->sc_iot, sc->sc_ioh, fs->fs_reg) & 0xFF;
|
|
DPRINTF(("%s: data 0x%x\n", __func__, data));
|
|
|
|
llmax = (sc->sc_tempsel & fs->fs_aux) ? 111 : 128;
|
|
if (data == 0 || data >= llmax) /* disconnected? */
|
|
edata->state = ENVSYS_SINVALID;
|
|
else {
|
|
edata->state = ENVSYS_SVALID;
|
|
edata->value_cur = data * 1000000 + 273150000;
|
|
}
|
|
}
|
|
|
|
/* fan speed appears to be a 12-bit number */
|
|
static void
|
|
finsio_refresh_fanrpm(struct finsio_softc *sc, envsys_data_t *edata)
|
|
{
|
|
struct finsio_sensor *fs = &sc->sc_finsio_sensors[edata->sensor];
|
|
int data;
|
|
|
|
data = finsio_readreg(sc->sc_iot, sc->sc_ioh, fs->fs_reg) << 8;
|
|
data |= finsio_readreg(sc->sc_iot, sc->sc_ioh, fs->fs_reg + 1);
|
|
DPRINTF(("%s: data 0x%x\n", __func__, data));
|
|
|
|
if (data >= 0xfff)
|
|
edata->state = ENVSYS_SINVALID;
|
|
else {
|
|
edata->value_cur = 1500000 / data;
|
|
edata->state = ENVSYS_SVALID;
|
|
}
|
|
}
|
|
|
|
MODULE(MODULE_CLASS_DRIVER, finsio, NULL);
|
|
|
|
#ifdef _MODULE
|
|
#include "ioconf.c"
|
|
#endif
|
|
|
|
static int
|
|
finsio_modcmd(modcmd_t cmd, void *opaque)
|
|
{
|
|
int error = 0;
|
|
|
|
switch (cmd) {
|
|
case MODULE_CMD_INIT:
|
|
#ifdef _MODULE
|
|
error = config_init_component(cfdriver_ioconf_finsio,
|
|
cfattach_ioconf_finsio, cfdata_ioconf_finsio);
|
|
#endif
|
|
return error;
|
|
case MODULE_CMD_FINI:
|
|
#ifdef _MODULE
|
|
error = config_fini_component(cfdriver_ioconf_finsio,
|
|
cfattach_ioconf_finsio, cfdata_ioconf_finsio);
|
|
#endif
|
|
return error;
|
|
default:
|
|
return ENOTTY;
|
|
}
|
|
}
|