634defef64
Some devices work (an, wdc), while others do not (ne, wi). However, the bus is useful enough that it makes sense to go ahead and enable it. Maybe other folks can help me debug the rest of the problems.
340 lines
7.9 KiB
C
340 lines
7.9 KiB
C
/* $NetBSD: dbau1550.c,v 1.6 2006/03/25 07:28:20 gdamore Exp $ */
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/*-
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* Copyright (c) 2006 Itronix Inc.
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* All rights reserved.
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*
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* Written by Garrett D'Amore for Itronix Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of Itronix Inc. may not be used to endorse
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* or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: dbau1550.c,v 1.6 2006/03/25 07:28:20 gdamore Exp $");
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/param.h>
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#include <sys/time.h>
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#include <sys/proc.h>
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#include <machine/bus.h>
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#include <machine/locore.h>
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#include <mips/alchemy/include/aureg.h>
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#include <mips/alchemy/dev/aupcmciavar.h>
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#include <mips/alchemy/dev/aupcmciareg.h>
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#include <mips/alchemy/dev/augpioreg.h>
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#include <evbmips/alchemy/obiovar.h>
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#include <evbmips/alchemy/board.h>
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#include <evbmips/alchemy/dbau1550reg.h>
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/*
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* This should be converted to use bus_space routines.
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*/
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#define GET16(x) \
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(*((volatile uint16_t *)MIPS_PHYS_TO_KSEG1(x)))
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#define PUT16(x, v) \
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(*((volatile uint16_t *)MIPS_PHYS_TO_KSEG1(x)) = (v))
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#define GET32(x) \
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(*((volatile uint32_t *)MIPS_PHYS_TO_KSEG1(x)))
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#define PUT32(x, v) \
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(*((volatile uint32_t *)MIPS_PHYS_TO_KSEG1(x)) = (v))
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static void dbau1550_init(void);
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static int dbau1550_pci_intr_map(struct pci_attach_args *,
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pci_intr_handle_t *);
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static void dbau1550_poweroff(void);
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static void dbau1550_reboot(void);
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static bus_addr_t dbau1550_slot_offset(int);
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static int dbau1550_slot_irq(int, int);
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static void dbau1550_slot_enable(int);
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static void dbau1550_slot_disable(int);
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static int dbau1550_slot_status(int);
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static const char *dbau1550_slot_name(int);
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static const struct obiodev dbau1550_devices[] = {
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#if 0
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{ "aupsc", -1, -1 },
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{ "aupsc", -1, -1 },
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{ "aupsc", -1, -1 },
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#endif
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{ NULL },
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};
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static struct aupcmcia_machdep dbau1550_pcmcia = {
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2, /* nslots */
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dbau1550_slot_offset,
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dbau1550_slot_irq,
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dbau1550_slot_enable,
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dbau1550_slot_disable,
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dbau1550_slot_status,
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dbau1550_slot_name,
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};
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static struct alchemy_board dbau1550_info = {
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"AMD Alchemy DBAu1550",
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dbau1550_devices,
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dbau1550_init,
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dbau1550_pci_intr_map,
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dbau1550_reboot,
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dbau1550_poweroff,
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&dbau1550_pcmcia,
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};
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const struct alchemy_board *
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board_info(void)
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{
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return &dbau1550_info;
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}
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void
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dbau1550_init(void)
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{
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uint16_t whoami;
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if (MIPS_PRID_COPTS(cpu_id) != MIPS_AU1550)
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panic("dbau1550: CPU not Au1550");
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/* check the whoami register for a match */
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whoami = GET16(DBAU1550_WHOAMI);
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if (DBAU1550_WHOAMI_BOARD(whoami) != DBAU1550_WHOAMI_DBAU1550_REV1)
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panic("dbau1550: WHOAMI (%x) not DBAu1550!", whoami);
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printf("DBAu1550 (cabernet), CPLDv%d, ",
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DBAU1550_WHOAMI_CPLD(whoami));
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if (DBAU1550_WHOAMI_DAUGHTER(whoami) != 0xf)
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printf("daughtercard 0x%x\n",
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DBAU1550_WHOAMI_DAUGHTER(whoami));
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else
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printf("no daughtercard\n");
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/* leave console and clocks alone -- YAMON should have got it right! */
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}
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int
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dbau1550_pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
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{
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/*
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* This platform has one onboard PCI IDE controller, and two
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* PCI expansion slots.
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*/
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static const int irqmap[3/*device*/][4/*pin*/] = {
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{ 5, -1, -1, -1 }, /* 11: IDE */
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{ 2, 5, 6, 1 }, /* 12: PCI Slot 2 */
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{ 1, 2, 5, 6 }, /* 13: PCI Slot 3 */
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};
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int pin, dev, irq;
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/* if interrupt pin not used... */
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if ((pin = pa->pa_intrpin) == 0)
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return 1;
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if (pin > 4) {
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printf("pci: bad interrupt pin %d\n", pin);
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return 1;
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}
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pci_decompose_tag(pa->pa_pc, pa->pa_intrtag, NULL, &dev, NULL);
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if ((dev < 11) || (dev > 13)) {
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printf("pci: bad device %d\n", dev);
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return 1;
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}
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if ((irq = irqmap[dev - 11][pin - 1]) == -1) {
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printf("pci: no IRQ routing for device %d pin %d\n", dev, pin);
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return 1;
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}
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*ihp = irq;
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return 0;
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}
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void
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dbau1550_reboot(void)
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{
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PUT16(DBAU1550_SOFTWARE_RESET, 0);
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wbflush();
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delay(100000); /* 100 msec */
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}
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void
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dbau1550_poweroff(void)
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{
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printf("\n- poweroff -\n");
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PUT16(DBAU1550_SOFTWARE_RESET,
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DBAU1550_SOFTWARE_RESET_PWROFF | DBAU1550_SOFTWARE_RESET_RESET);
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wbflush();
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delay(100000); /* 100 msec */
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}
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int
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dbau1550_slot_irq(int slot, int which)
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{
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static const int irqmap[2/*slot*/][2/*which*/] = {
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{ 35, 32 }, /* Slot 0: Bottom */
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{ 37, 33 }, /* Slot 1: Top */
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};
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if ((slot >= 2) || (which >= 2))
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return -1;
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return (irqmap[slot][which]);
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}
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bus_addr_t
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dbau1550_slot_offset(int slot)
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{
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switch (slot) {
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case 0:
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return (DBAU1550_PC0_ADDR);
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case 1:
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return (DBAU1550_PC1_ADDR);
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}
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return (bus_addr_t)-1;
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}
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void
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dbau1550_slot_enable(int slot)
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{
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uint16_t status;
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uint16_t vcc, vpp;
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int shift;
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status = GET16(DBAU1550_STATUS);
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switch (slot) {
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case 0:
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status >>= DBAU1550_STATUS_PCMCIA0_VS_SHIFT;
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shift = DBAU1550_PCMCIA_PC0_SHIFT;
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break;
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case 1:
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status >>= DBAU1550_STATUS_PCMCIA1_VS_SHIFT;
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shift = DBAU1550_PCMCIA_PC1_SHIFT;
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break;
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default:
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return;
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}
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status &= DBAU1550_STATUS_PCMCIA_VS_MASK;
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switch (status) {
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case DBAU1550_STATUS_PCMCIA_VS_GND:
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vcc = DBAU1550_PCMCIA_VCC_GND;
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vpp = DBAU1550_PCMCIA_VPP_GND;
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break;
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case DBAU1550_STATUS_PCMCIA_VS_5V:
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vcc = DBAU1550_PCMCIA_VCC_5V;
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vpp = DBAU1550_PCMCIA_VPP_VCC;
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break;
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default: /* covers both 3.3v cases */
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vcc = DBAU1550_PCMCIA_VCC_3V;
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vpp = DBAU1550_PCMCIA_VPP_VCC;
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break;
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}
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status = GET16(DBAU1550_PCMCIA);
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/* this clears all bits for this slot */
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status &= ~(DBAU1550_PCMCIA_MASK << shift);
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status |= vcc << shift;
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status |= vpp << shift;
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PUT16(DBAU1550_PCMCIA, status);
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wbflush();
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tsleep(&status, PWAIT, "pcmcia_reset_0", mstohz(100));
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status |= (DBAU1550_PCMCIA_DRV_EN << shift);
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PUT16(DBAU1550_PCMCIA, status);
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wbflush();
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tsleep(&status, PWAIT, "pcmcia_reset_start", mstohz(300));
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/* take it out of reset */
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status |= (DBAU1550_PCMCIA_RST << shift);
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PUT16(DBAU1550_PCMCIA, status);
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wbflush();
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/* spec says 20 msec, but experience shows even 200 is not enough */
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tsleep(&status, PWAIT, "pcmcia_reset_finish", mstohz(1000));
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/* NOTE: WE DO NOT SUPPORT DIFFERENT VCC/VPP LEVELS! */
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/* This means that 12V cards are not supported! */
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}
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void
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dbau1550_slot_disable(int slot)
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{
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int shift;
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uint16_t status;
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switch (slot) {
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case 0:
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shift = DBAU1550_PCMCIA_PC0_SHIFT;
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break;
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case 1:
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shift = DBAU1550_PCMCIA_PC1_SHIFT;
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break;
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}
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status = GET16(DBAU1550_PCMCIA);
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status &= ~(DBAU1550_PCMCIA_MASK);
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PUT16(DBAU1550_PCMCIA, status);
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wbflush();
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}
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int
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dbau1550_slot_status(int slot)
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{
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uint16_t status, mask;
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status = GET16(DBAU1550_STATUS);
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switch (slot) {
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case 0:
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mask = DBAU1550_STATUS_PCMCIA0_INSERTED;
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break;
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case 1:
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mask = DBAU1550_STATUS_PCMCIA1_INSERTED;
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break;
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default:
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return 0;
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}
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return ((mask & status) ? 0 : 1);
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}
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const char *
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dbau1550_slot_name(int slot)
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{
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switch (slot) {
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case 0:
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return "bottom slot";
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case 1:
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return "top slot";
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default:
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return "???";
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}
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}
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